target/rockchip: add r5c
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304b8561cc
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24
target/linux/rockchip/image/rk3568-friendlyelec.bootscript
Normal file
24
target/linux/rockchip/image/rk3568-friendlyelec.bootscript
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@ -0,0 +1,24 @@
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# friendlyelec rk3568 combined image, board detected by ADC
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env delete hwrev
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env delete adc_value
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# using SARADC CH1 to detect hwrev
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adc single saradc@fe720000 1 adc_value
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if test -n "$adc_value"; then
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if test "$adc_value" -ge 151; then
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echo board rev02
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setenv hwrev 1
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fi
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fi
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part uuid mmc ${devnum}:2 uuid
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setenv bootargs "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=${uuid} rw rootwait"
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load mmc ${devnum}:1 ${fdt_addr_r} rockchip${hwrev}.dtb
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load mmc ${devnum}:1 ${kernel_addr_r} kernel.img
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booti ${kernel_addr_r} - ${fdt_addr_r}
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@ -11,6 +11,11 @@ define Device/rk3568_combined
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IMAGES := combined.img.gz
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endef
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define Device/rk3568_combined_friendlyelec
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IMAGE/combined.img.gz := boot-combined | boot-script rk3568-friendlyelec | pine64-img | gzip | append-metadata
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IMAGES := combined.img.gz
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endef
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define Device/fastrhino_common
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$(call Device/rk3568)
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DEVICE_VENDOR := FastRhino
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@ -55,9 +60,11 @@ TARGET_DEVICES += hinlink_opc-h6xk
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define Device/friendlyarm_nanopi-r5s
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$(call Device/rk3568)
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$(call Device/rk3568_combined_friendlyelec)
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DEVICE_VENDOR := FriendlyARM
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DEVICE_MODEL := NanoPi R5S
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SUPPORTED_DEVICES += friendlyelec,nanopi-r5s friendlyarm,nanopi-r5s
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DEVICE_MODEL := NanoPi R5S/R5C combined
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SUPPORTED_DEVICES += friendlyelec,nanopi-r5s friendlyarm,nanopi-r5s friendlyelec,nanopi-r5c
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DEVICE_DTS := rk3568-nanopi-r5s rk3568-nanopi-r5c
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DEVICE_PACKAGES := kmod-r8125 kmod-nvme kmod-scsi-core kmod-hwmon-pwmfan kmod-thermal
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endef
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TARGET_DEVICES += friendlyarm_nanopi-r5s
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@ -20,6 +20,10 @@ friendlyelec,nanopi-r5s)
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ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "eth1"
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ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "eth2"
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;;
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friendlyelec,nanopi-r5c)
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ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0"
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ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "eth1"
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;;
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hinlink,opc-h68k|\
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hinlink,opc-h66k)
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ucidef_set_led_netdev "wan" "WAN" "blue:net" "eth0"
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@ -11,6 +11,7 @@ rockchip_setup_interfaces()
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local board="$1"
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case "$board" in
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friendlyelec,nanopi-r5c|\
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fastrhino,r66s|\
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hinlink,opc-h66k|\
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firefly,rk3568-roc-pc)
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@ -46,6 +47,7 @@ rockchip_setup_macs()
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case "$board" in
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firefly,rk3568-roc-pc|\
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friendlyelec,nanopi-r5s|\
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friendlyelec,nanopi-r5c|\
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hinlink,opc-h68k|\
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hinlink,opc-h66k|\
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lyt,t68m|\
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@ -48,6 +48,7 @@ set_iface_cpumask() {
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board_fixup_iface_name() {
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local device
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case $(board_name) in
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friendlyelec,nanopi-r5c|\
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fastrhino,r66s)
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device="$(get_iface_device eth0)"
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if [[ "$device" = "0001:11:00.0" ]]; then
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@ -150,6 +151,7 @@ board_set_iface_smp_affinity() {
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set_iface_cpumask 1 "eth3" "eth3-16"
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fi
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;;
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friendlyelec,nanopi-r5c|\
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fastrhino,r66s|\
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hinlink,opc-h66k)
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if ethtool -i eth0 | grep -Fq 'driver: r8169'; then
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216
target/linux/rockchip/rk3568/dts/rk3568-nanopi-r5c.dts
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216
target/linux/rockchip/rk3568/dts/rk3568-nanopi-r5c.dts
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@ -0,0 +1,216 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
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* (http://www.friendlyelec.com)
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*/
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/dts-v1/;
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#include "rk3568.dtsi"
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#include "rk3568-nanopi5-common.dtsi"
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/ {
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model = "FriendlyElec NanoPi R5C";
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compatible = "friendlyelec,nanopi-r5c", "rockchip,rk3568";
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aliases {
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ethernet0 = &r8125_1;
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ethernet1 = &r8125_2;
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};
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gpio_keys: gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&key1_pin>;
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button@1 {
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debounce-interval = <50>;
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gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
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label = "K1";
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linux,code = <BTN_1>;
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wakeup-source;
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};
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};
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gpio_leds: gpio-leds {
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compatible = "gpio-leds";
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sys_led: led-0 {
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gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
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label = "red:sys";
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linux,default-trigger = "heartbeat";
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pinctrl-names = "default";
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pinctrl-0 = <&sys_led_pin>;
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};
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wan_led: led-1 {
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gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
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label = "green:wan";
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pinctrl-names = "default";
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pinctrl-0 = <&wan_led_pin>;
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};
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lan1_led: led-2 {
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gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
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label = "green:lan1";
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pinctrl-names = "default";
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pinctrl-0 = <&lan1_led_pin>;
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};
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lan2_led: led-3 {
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gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
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label = "green:wlan";
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pinctrl-names = "default";
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pinctrl-0 = <&lan2_led_pin>;
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};
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};
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m2_wlan_radio: m2-wlan-radio {
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compatible = "rfkill-gpio";
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type = "wlan";
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shutdown-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
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};
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};
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&combphy0_us {
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status = "okay";
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};
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&combphy1_usq {
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status = "okay";
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};
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&combphy2_psq {
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status = "okay";
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};
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&dfi {
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status = "disabled";
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};
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&dmc {
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status = "disabled";
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};
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&mach {
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hwrev = <2>;
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model = "NanoPi R5C";
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};
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&i2c5 {
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status = "okay";
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hym8563: hym8563@51 {
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compatible = "haoyu,hym8563";
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reg = <0x51>;
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pinctrl-names = "default";
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pinctrl-0 = <&rtc_int>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
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wakeup-source;
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};
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};
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&pcie30phy {
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status = "okay";
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};
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&pcie2x1 {
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num-viewport = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&m2_w_disable_pin>;
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reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&pcie3x1 {
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num-viewport = <4>;
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rockchip,bifurcation;
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rockchip,init-delay-ms = <100>;
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reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
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status = "okay";
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pcie@10 {
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reg = <0x00100000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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r8125_2: pcie@10,0 {
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reg = <0x000000 0 0 0 0>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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};
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&pcie3x2 {
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num-viewport = <4>;
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rockchip,bifurcation;
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reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
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status = "okay";
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pcie@20 {
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reg = <0x00200000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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r8125_1: pcie@20,0 {
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reg = <0x000000 0 0 0 0>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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};
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&pinctrl {
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gpio-key {
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key1_pin: key1-pin {
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rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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gpio-leds {
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sys_led_pin: sys-led-pin {
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rockchip,pins =
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<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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wan_led_pin: wan-led-pin {
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rockchip,pins =
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<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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lan1_led_pin: lan1-led-pin {
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rockchip,pins =
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<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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lan2_led_pin: lan2-led-pin {
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rockchip,pins =
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<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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m2-pins {
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m2_w_disable_pin: m2-w-disable-pin {
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rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_output_high>;
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};
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};
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rtc {
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rtc_int: rtc-int {
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rockchip,pins =
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<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&pwm0 {
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status = "disabled";
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};
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&sata2 {
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status = "disabled";
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};
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&sfc {
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status = "disabled";
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};
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