From 21cede76d13847e2697980fc19c3d16d05553dd8 Mon Sep 17 00:00:00 2001 From: Liangbin Lian Date: Wed, 5 Feb 2025 16:47:03 +0800 Subject: [PATCH] uboot-rockchip: add generic RK3588 uboot --- package/boot/uboot-rockchip/Makefile | 6 ++ .../arch/arm/dts/rk3588-easepi-u-boot.dtsi | 3 + .../src/configs/easepi-rk3588_defconfig | 62 ++++++++++++++ .../src/arm64/rockchip/rk3588-easepi.dts | 85 +++++++++++++++++++ 4 files changed, 156 insertions(+) create mode 100644 package/boot/uboot-rockchip/src/arch/arm/dts/rk3588-easepi-u-boot.dtsi create mode 100644 package/boot/uboot-rockchip/src/configs/easepi-rk3588_defconfig create mode 100644 package/boot/uboot-rockchip/src/dts/upstream/src/arm64/rockchip/rk3588-easepi.dts diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index 7070ca973d..9af09b93d9 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -252,6 +252,11 @@ define U-Boot/rk3588/Default TPL:=rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin endef +define U-Boot/easepi-rk3588 + $(U-Boot/rk3588/Default) + NAME:=Easepi RK3588 +endef + define U-Boot/nanopc-t6-rk3588 $(U-Boot/rk3588/Default) NAME:=NanoPC T6 @@ -322,6 +327,7 @@ UBOOT_TARGETS := \ radxa-e25-rk3568 \ rock-3a-rk3568 \ rock-3b-rk3568 \ + easepi-rk3588 \ nanopc-t6-rk3588 \ rock5b-rk3588 \ sige7-rk3588 \ diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588-easepi-u-boot.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588-easepi-u-boot.dtsi new file mode 100644 index 0000000000..853ed58cfe --- /dev/null +++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588-easepi-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3588s-u-boot.dtsi" diff --git a/package/boot/uboot-rockchip/src/configs/easepi-rk3588_defconfig b/package/boot/uboot-rockchip/src/configs/easepi-rk3588_defconfig new file mode 100644 index 0000000000..6a4893bffc --- /dev/null +++ b/package/boot/uboot-rockchip/src/configs/easepi-rk3588_defconfig @@ -0,0 +1,62 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-easepi" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_EVB_RK3588=y +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-easepi.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_ATF=y +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_PWM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +# CONFIG_SPI_FLASH is not set +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_SPL_PINCTRL=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_ERRNO_STR=y diff --git a/package/boot/uboot-rockchip/src/dts/upstream/src/arm64/rockchip/rk3588-easepi.dts b/package/boot/uboot-rockchip/src/dts/upstream/src/arm64/rockchip/rk3588-easepi.dts new file mode 100644 index 0000000000..889874180a --- /dev/null +++ b/package/boot/uboot-rockchip/src/dts/upstream/src/arm64/rockchip/rk3588-easepi.dts @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include "rk3588s.dtsi" + +/ { + model = "Easepi RK3588 Board"; + compatible = "linkease,rk3588-demo", "rockchip,rk3588"; + + aliases { + ethernet0 = &gmac1; + mmc0 = &sdmmc; + mmc1 = &sdhci; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; +}; + +&gmac1 { + clock_in_out = "output"; + phy-handle = <&rgmii_phy1>; + phy-mode = "rgmii-rxid"; + pinctrl-0 = <&gmac1_miim + &gmac1_tx_bus2 + &gmac1_rx_bus2 + &gmac1_rgmii_clk + &gmac1_rgmii_bus>; + pinctrl-names = "default"; + tx_delay = <0x42>; + status = "okay"; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id001c.c916"; + reg = <0x1>; + pinctrl-names = "default"; + pinctrl-0 = <&rtl8211f_rst>; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + rtl8211f { + rtl8211f_rst: rtl8211f-rst { + rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&saradc { + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + no-sdio; + no-sd; + non-removable; + mmc-hs200-1_8v; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-sd-highspeed; + disable-wp; + max-frequency = <150000000>; + no-mmc; + no-sdio; + sd-uhs-sdr104; + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +};