diff --git a/package/boot/uboot-rk35/src/arch/arm/dts/rk3568-easepi-u-boot.dtsi b/package/boot/uboot-rk35/src/arch/arm/dts/rk3568-easepi-u-boot.dtsi
index a3578dc4f2..a95cbef421 100644
--- a/package/boot/uboot-rk35/src/arch/arm/dts/rk3568-easepi-u-boot.dtsi
+++ b/package/boot/uboot-rk35/src/arch/arm/dts/rk3568-easepi-u-boot.dtsi
@@ -7,54 +7,54 @@
 #include "rk3568-u-boot.dtsi"
 
 &gmac0 {
-	phy-mode = "rgmii";
-	clock_in_out = "input";
-
 	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	/* Reset time is 20ms, 100ms for rtl8211f */
 	snps,reset-delays-us = <0 20000 100000>;
 
+	phy-mode = "rgmii";
+	clock_in_out = "output";
+
 	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
-	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>;
+	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
+	assigned-clock-rates = <0>, <125000000>;
 
 	pinctrl-names = "default";
 	pinctrl-0 = <&gmac0_miim
 		     &gmac0_tx_bus2
 		     &gmac0_rx_bus2
 		     &gmac0_rgmii_clk
-		     &gmac0_rgmii_bus
-		     &gmac0_clkinout>;
+		     &gmac0_rgmii_bus>;
 
-	tx_delay = <0x3c>;
-	rx_delay = <0x2f>;
+	tx_delay = <0x35>;
+	rx_delay = <0x2b>;
 
 	phy-handle = <&rgmii_phy0>;
 	status = "okay";
 };
 
 &gmac1 {
-	phy-mode = "rgmii";
-	clock_in_out = "input";
-
 	snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	/* Reset time is 20ms, 100ms for rtl8211f */
 	snps,reset-delays-us = <0 20000 100000>;
 
+	phy-mode = "rgmii";
+	clock_in_out = "output";
+
 	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
-	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
+	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
+	assigned-clock-rates = <0>, <125000000>;
 
 	pinctrl-names = "default";
 	pinctrl-0 = <&gmac1m1_miim
 		     &gmac1m1_tx_bus2
 		     &gmac1m1_rx_bus2
 		     &gmac1m1_rgmii_clk
-		     &gmac1m1_rgmii_bus
-		     &gmac1m1_clkinout>;
+		     &gmac1m1_rgmii_bus>;
 
-	tx_delay = <0x4f>;
-	rx_delay = <0x26>;
+	tx_delay = <0x42>;
+	rx_delay = <0x27>;
 
 	phy-handle = <&rgmii_phy1>;
 	status = "okay";
diff --git a/package/boot/uboot-rk35/src/arch/arm/dts/rk3568-easepi.dtsi b/package/boot/uboot-rk35/src/arch/arm/dts/rk3568-easepi.dtsi
index e68b1487fd..70955f2dcd 100644
--- a/package/boot/uboot-rk35/src/arch/arm/dts/rk3568-easepi.dtsi
+++ b/package/boot/uboot-rk35/src/arch/arm/dts/rk3568-easepi.dtsi
@@ -30,55 +30,54 @@
 };
 
 &gmac0 {
-	phy-mode = "rgmii";
-	clock_in_out = "input";
-
 	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	/* Reset time is 20ms, 100ms for rtl8211f */
 	snps,reset-delays-us = <0 20000 100000>;
+
+	phy-mode = "rgmii";
+	clock_in_out = "output";
+
 	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
-	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>;
-	// assigned-clock-rates = <0>, <125000000>;
+	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
+	assigned-clock-rates = <0>, <125000000>;
 
 	pinctrl-names = "default";
 	pinctrl-0 = <&gmac0_miim
 		     &gmac0_tx_bus2
 		     &gmac0_rx_bus2
 		     &gmac0_rgmii_clk
-		     &gmac0_rgmii_bus
-		     &gmac0_clkinout>;
+		     &gmac0_rgmii_bus>;
 
-	tx_delay = <0x3c>;
-	rx_delay = <0x2f>;
+	tx_delay = <0x35>;
+	rx_delay = <0x2b>;
 
 	phy-handle = <&rgmii_phy0>;
 	status = "okay";
 };
 
 &gmac1 {
-	phy-mode = "rgmii";
-	clock_in_out = "input";
-
 	snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	/* Reset time is 20ms, 100ms for rtl8211f */
 	snps,reset-delays-us = <0 20000 100000>;
 
+	phy-mode = "rgmii";
+	clock_in_out = "output";
+
 	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
-	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
-	// assigned-clock-rates = <0>, <125000000>;
+	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
+	assigned-clock-rates = <0>, <125000000>;
 
 	pinctrl-names = "default";
 	pinctrl-0 = <&gmac1m1_miim
 		     &gmac1m1_tx_bus2
 		     &gmac1m1_rx_bus2
 		     &gmac1m1_rgmii_clk
-		     &gmac1m1_rgmii_bus
-			 &gmac1m1_clkinout>;
+		     &gmac1m1_rgmii_bus>;
 
-	tx_delay = <0x4f>;
-	rx_delay = <0x26>;
+	tx_delay = <0x42>;
+	rx_delay = <0x27>;
 
 	phy-handle = <&rgmii_phy1>;
 	status = "okay";