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package/rockchip-drivers: add dvfs support

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Signed-off-by: Liangbin Lian <jjm2473@gmail.com>
This commit is contained in:
Liangbin Lian 2025-09-10 13:57:32 +08:00
parent f100785de9
commit 8d12231e8a
24 changed files with 8203 additions and 46 deletions
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69
package/kernel/rockchip-drivers/Makefile
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@ -3,7 +3,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=rockchip-drivers
PKG_VERSION:=24.11.2
PKG_RELEASE:=1
PKG_RELEASE:=2
PKG_HASH:=92a837b8ea38adbd32f2879561322f247fa6606e3d0abe4dd73eb738200a1897
PKG_SOURCE_URL_FILE:=v$(PKG_VERSION).tar.gz
@ -11,6 +11,7 @@ PKG_SOURCE:=rockchip-drivers-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/jjm2473/rockchip-drivers/archive/refs/tags/
PKG_BUILD_PARALLEL:=1
PKG_EXTMOD_SUBDIRS:=drivers
PKG_MAINTAINER:=jjm2473 <jjm2473@gmail.com>
@ -20,6 +21,48 @@ include $(INCLUDE_DIR)/package.mk
TAR_OPTIONS+= --strip-components 1
TAR_CMD=$(HOST_TAR) -C $(1) $(TAR_OPTIONS)
define KernelPackage/rockchip-sip
TITLE:=Rockchip SIP interface
HIDDEN:=1
FILES:= \
$(PKG_BUILD_DIR)/drivers/firmware/rockchip_sip.ko
endef
define KernelPackage/rockchip-pvtm
TITLE:=Rockchip PVTM support
HIDDEN:=1
FILES:= \
$(PKG_BUILD_DIR)/drivers/soc/rockchip/rockchip_pvtm.ko
AUTOLOAD:=$(call AutoProbe,rockchip_pvtm)
endef
define KernelPackage/rockchip-opp-select
TITLE:=Rockchip OPP select support
HIDDEN:=1
DEPENDS:=+kmod-rockchip-pvtm +kmod-rockchip-sip
KCONFIG:=CONFIG_PM_DEVFREQ=y
FILES:= \
$(PKG_BUILD_DIR)/drivers/soc/rockchip/rockchip_opp_select.ko
endef
define KernelPackage/rockchip-system-monitor
TITLE:=Rockchip system monitor support
DEPENDS:=+kmod-rockchip-opp-select
HIDDEN:=1
FILES:= \
$(PKG_BUILD_DIR)/drivers/soc/rockchip/rockchip_system_monitor.ko
AUTOLOAD:=$(call AutoProbe,rockchip_system_monitor)
endef
# rockchip-ipa is only for linux before 6.1.0
define KernelPackage/rockchip-ipa
TITLE:=Rockchip IPA support
DEPENDS:=+kmod-rockchip-opp-select
HIDDEN:=1
FILES:= \
$(PKG_BUILD_DIR)/drivers/soc/rockchip/rockchip_ipa.ko
endef
define KernelPackage/rga2
SUBMENU:=Video Support
TITLE:=RK RGA2
@ -51,7 +94,7 @@ endef
define KernelPackage/rk_vcodec
SUBMENU:=Video Support
TITLE:=RK mpp service framework (rk_vcodec)
DEPENDS:=@TARGET_rockchip
DEPENDS:=@TARGET_rockchip +kmod-rockchip-system-monitor
FILES:= \
$(PKG_BUILD_DIR)/drivers/video/rockchip/mpp/rk_vcodec.ko
AUTOLOAD:=$(call AutoProbe,rk_vcodec)
@ -64,7 +107,7 @@ endef
define KernelPackage/rknpu
SUBMENU:=Other modules
TITLE:=Rockchip RKNPU driver
DEPENDS:=@TARGET_rockchip +kmod-drm
DEPENDS:=@TARGET_rockchip +kmod-drm +kmod-rockchip-system-monitor
KCONFIG:=CONFIG_SYNC_FILE=y
FILES:= \
$(PKG_BUILD_DIR)/drivers/rknpu/rknpu.ko
@ -81,7 +124,11 @@ config-y:= CPU_RK3568 \
CPU_RK3576 \
CPU_RK3562 \
CPU_RK3368
config-m:=
config-m:= ROCKCHIP_PVTM \
ROCKCHIP_IPA \
ROCKCHIP_SIP \
ROCKCHIP_SYSTEM_MONITOR \
ROCKCHIP_OPP
ifdef CONFIG_PACKAGE_kmod-rga2
config-m += ROCKCHIP_RGA2
@ -138,18 +185,16 @@ define Build/Compile
+$(MAKE) $(PKG_JOBS) -C "$(LINUX_DIR)" \
$(KERNEL_MAKE_FLAGS) \
$(PKG_MAKE_FLAGS) \
M="$(PKG_BUILD_DIR)/drivers/video/rockchip" \
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \
modules
+$(MAKE) $(PKG_JOBS) -C "$(LINUX_DIR)" \
$(KERNEL_MAKE_FLAGS) \
$(PKG_MAKE_FLAGS) \
M="$(PKG_BUILD_DIR)/drivers/rknpu" \
M="$(PKG_BUILD_DIR)/drivers" \
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \
modules
endef
$(eval $(call KernelPackage,rockchip-sip))
$(eval $(call KernelPackage,rockchip-ipa))
$(eval $(call KernelPackage,rockchip-pvtm))
$(eval $(call KernelPackage,rockchip-opp-select))
$(eval $(call KernelPackage,rockchip-system-monitor))
$(eval $(call KernelPackage,rga2))
$(eval $(call KernelPackage,rga3))
$(eval $(call KernelPackage,rk_vcodec))

34
package/kernel/rockchip-drivers/patches/117-fix-rockchip_opp_set_low_length-undefined.patch
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@ -1,34 +0,0 @@
From f621cf43274a3ba9a644ed02cd38f09919244e41 Mon Sep 17 00:00:00 2001
From: jjm2473 <jjm2473@gmail.com>
Date: Wed, 3 Sep 2025 15:05:32 +0800
Subject: [PATCH] fix rockchip_opp_set_low_length undefined
---
include/soc/rockchip/rockchip_opp_select.h | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/include/soc/rockchip/rockchip_opp_select.h
+++ b/include/soc/rockchip/rockchip_opp_select.h
@@ -166,6 +166,8 @@ int rockchip_set_intermediate_rate(struc
struct clk *clk, unsigned long old_freq,
unsigned long new_freq, bool is_scaling_up,
bool is_set_clk);
+int rockchip_opp_set_low_length(struct device *dev, struct device_node *np,
+ struct rockchip_opp_info *opp_info);
int rockchip_opp_config_regulators(struct device *dev,
struct dev_pm_opp *old_opp,
struct dev_pm_opp *new_opp,
@@ -252,6 +254,13 @@ rockchip_set_intermediate_rate(struct de
{
return -EOPNOTSUPP;
}
+
+static inline int
+rockchip_opp_set_low_length(struct device *dev, struct device_node *np,
+ struct rockchip_opp_info *opp_info)
+{
+ return -EOPNOTSUPP;
+}
static inline int
rockchip_opp_config_regulators(struct device *dev,

111
package/kernel/rockchip-drivers/patches/117-include-soc-rockchip-sync-6.6.patch Normal file
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@ -0,0 +1,111 @@
From b53308643ce75bd4b1ffb47572d19c8c2aed8529 Mon Sep 17 00:00:00 2001
From: jjm2473 <jjm2473@gmail.com>
Date: Wed, 3 Sep 2025 15:05:32 +0800
Subject: [PATCH] include/soc/rockchip: sync from develop-6.6
---
include/soc/rockchip/rockchip_opp_select.h | 17 +++++++++++++++++
include/soc/rockchip/rockchip_system_monitor.h | 14 +++++++++++++-
2 files changed, 30 insertions(+), 1 deletion(-)
--- a/include/soc/rockchip/rockchip_opp_select.h
+++ b/include/soc/rockchip/rockchip_opp_select.h
@@ -44,6 +44,7 @@ struct volt_rm_table {
struct rockchip_opp_data {
config_clks_t config_clks;
config_regulators_t config_regulators;
+ bool is_use_pvtpll;
int (*get_soc_info)(struct device *dev, struct device_node *np,
int *bin, int *process);
@@ -97,6 +98,7 @@ struct pvtpll_opp_table {
* @init_freq: Set the initial frequency when init opp table.
* @is_rate_volt_checked: Marks if device has checked initial rate and voltage.
* @pvtpll_clk_id: Device's clock id.
+ * @pvtpll_smc: Marks if smc call of pvtpll is available.
* @pvtpll_low_temp: Marks if device has low temperature pvtpll config.
*/
struct rockchip_opp_info {
@@ -138,9 +140,15 @@ struct rockchip_opp_info {
bool is_rate_volt_checked;
u32 pvtpll_clk_id;
+ bool pvtpll_smc;
bool pvtpll_low_temp;
};
+static inline bool rockchip_opp_is_use_pvtpll(struct rockchip_opp_info *info)
+{
+ return (info->is_scmi_clk || (info->data && info->data->is_use_pvtpll));
+}
+
#if IS_ENABLED(CONFIG_ROCKCHIP_OPP)
int rockchip_of_get_leakage(struct device *dev, char *lkg_name, int *leakage);
int rockchip_nvmem_cell_read_u8(struct device_node *np, const char *cell_id,
@@ -166,6 +174,8 @@ int rockchip_set_intermediate_rate(struc
struct clk *clk, unsigned long old_freq,
unsigned long new_freq, bool is_scaling_up,
bool is_set_clk);
+int rockchip_opp_set_low_length(struct device *dev, struct device_node *np,
+ struct rockchip_opp_info *opp_info);
int rockchip_opp_config_regulators(struct device *dev,
struct dev_pm_opp *old_opp,
struct dev_pm_opp *new_opp,
@@ -252,6 +262,13 @@ rockchip_set_intermediate_rate(struct de
{
return -EOPNOTSUPP;
}
+
+static inline int
+rockchip_opp_set_low_length(struct device *dev, struct device_node *np,
+ struct rockchip_opp_info *opp_info)
+{
+ return -EOPNOTSUPP;
+}
static inline int
rockchip_opp_config_regulators(struct device *dev,
--- a/include/soc/rockchip/rockchip_system_monitor.h
+++ b/include/soc/rockchip/rockchip_system_monitor.h
@@ -80,7 +80,8 @@ struct temp_opp_table {
* @low_temp_min_volt: Minimum voltage of OPPs when low temperature, in
* microvolt
* @high_temp_max_volt: Maximum voltage when high temperature, in microvolt
- * @video_4k_freq: Maximum frequency when paly 4k video, in KHz
+ * @video_1080p_freq: Maximum frequency when play 1080p video, in KHz
+ * @video_4k_freq: Maximum frequency when play 4k video, in KHz
* @reboot_freq: Limit maximum and minimum frequency when reboot, in KHz
* @status_min_limit: Minimum frequency of some status frequency, in KHz
* @status_max_limit: Minimum frequency of all status frequency, in KHz
@@ -111,6 +112,7 @@ struct monitor_dev_info {
unsigned long low_temp_min_volt;
unsigned long high_temp_max_volt;
unsigned int early_suspend_freq;
+ unsigned int video_1080p_freq;
unsigned int video_4k_freq;
unsigned int reboot_freq;
unsigned int status_min_limit;
@@ -149,6 +151,8 @@ int rockchip_monitor_dev_low_temp_adjust
int rockchip_monitor_dev_high_temp_adjust(struct monitor_dev_info *info,
bool is_high);
int rockchip_monitor_suspend_low_temp_adjust(int cpu);
+void rockchip_monitor_remove_cpu_limit(int cpu);
+void rockchip_monitor_restore_cpu_limit(int cpu);
int rockchip_system_monitor_register_notifier(struct notifier_block *nb);
void rockchip_system_monitor_unregister_notifier(struct notifier_block *nb);
#else
@@ -201,6 +205,14 @@ static inline int rockchip_monitor_suspe
return 0;
};
+static inline void rockchip_monitor_remove_cpu_limit(int cpu)
+{
+};
+
+static inline void rockchip_monitor_restore_cpu_limit(int cpu)
+{
+};
+
static inline int
rockchip_system_monitor_register_notifier(struct notifier_block *nb)
{

130
package/kernel/rockchip-drivers/patches/118-include-rockchip_sip-sync-6.6.patch Normal file
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@ -0,0 +1,130 @@
From afa7e4065ba4f577a516feeca495e4ecc527524e Mon Sep 17 00:00:00 2001
From: jjm2473 <jjm2473@gmail.com>
Date: Wed, 10 Sep 2025 13:31:37 +0800
Subject: [PATCH] include/rockchip_sip.h: sync from develop-6.6
---
include/linux/rockchip/rockchip_sip.h | 56 +++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
--- a/include/linux/rockchip/rockchip_sip.h
+++ b/include/linux/rockchip/rockchip_sip.h
@@ -33,6 +33,7 @@
#define PSCI_SIP_VPU_RESET 0x8200000c
#define SIP_BUS_CFG 0x8200000d
#define SIP_LAST_LOG 0x8200000e
+#define SIP_ACCESS_MEM_OS_REG 0x8200000f
#define SIP_SCMI_AGENT0 0x82000010
#define SIP_SCMI_AGENT1 0x82000011
#define SIP_SCMI_AGENT2 0x82000012
@@ -58,6 +59,8 @@
#define SIP_HDMIRX_CFG 0x82000027
#define SIP_MCU_CFG 0x82000028
#define SIP_PVTPLL_CFG 0x82000029
+#define SIP_GPIO_CFG 0x8200002c
+#define SIP_CPU_PM_CFG 0x8200002d
#define TRUSTED_OS_HDCPKEY_INIT 0xB7000003
@@ -110,6 +113,13 @@
#define LINUX_PM_STATE 0x09
#define SUSPEND_IO_RET_CONFIG 0x0a
#define SLEEP_PIN_CONFIG 0x0b
+#define SLEEP_IO_CONFIG 0x0c
+
+enum {
+ RK_PM_SLEEP_IO_CFG_CNT = 0,
+ RK_PM_SLEEP_IO_CFG_VAL = 1,
+ RK_PM_SLEEP_IO_CFG_MAX,
+};
/* SIP_REMOTECTL_CFG call types */
#define REMOTECTL_SET_IRQ 0xf0
@@ -120,6 +130,12 @@
/* wakeup state */
#define REMOTECTL_PWRKEY_WAKEUP 0xdeadbeaf
+/* SIP_ACCESS_MEM_OS_REG child configs */
+enum {
+ RK_MEM_OS_REG_READ = 0,
+ RK_MEM_OS_REG_WRITE,
+};
+
/* SIP_MCU_CFG child configs, MCU ID */
enum {
RK_BUS_MCU,
@@ -232,6 +248,22 @@ enum {
PVTPLL_GET_INFO = 0,
PVTPLL_ADJUST_TABLE = 1,
PVTPLL_LOW_TEMP = 2,
+ PVTPLL_VOLT_SEL = 3,
+};
+
+/* SIP_GPIO_CFG child configs */
+enum {
+ GPIO_GET_GROUP_INFO = 0,
+ GPIO_SET_GROUP_INFO = 1,
+ GPIO_GET_VIRT_EN = 2,
+ GPIO_SET_VIRT_EN = 3,
+ GPIO_SET_STORE_ST = 4,
+ GPIO_CLEAR_STORE_ST = 5,
+};
+
+/* SIP_CPU_PM_CFG child configs */
+enum {
+ CPU_PM_CLUST_AUTO_PD_EN = 0,
};
struct pt_regs;
@@ -262,6 +294,7 @@ int sip_smc_secure_reg_write(u32 addr_ph
u32 sip_smc_secure_reg_read(u32 addr_phy);
struct arm_smccc_res sip_smc_bus_config(u32 arg0, u32 arg1, u32 arg2);
struct dram_addrmap_info *sip_smc_get_dram_map(void);
+int sip_smc_access_mem_os_reg(u32 func, u32 id, u32 *val);
int sip_smc_amp_config(u32 sub_func_id, u32 arg1, u32 arg2, u32 arg3);
struct arm_smccc_res sip_smc_get_amp_info(u32 sub_func_id, u32 arg1);
struct arm_smccc_res sip_smc_get_pvtpll_info(u32 sub_func_id, u32 arg1);
@@ -270,6 +303,9 @@ struct arm_smccc_res sip_smc_pvtpll_conf
void __iomem *sip_hdcp_request_share_memory(int id);
struct arm_smccc_res sip_hdcp_config(u32 arg0, u32 arg1, u32 arg2);
+struct arm_smccc_res sip_smc_gpio_config(u32 sub_func_id, u32 arg1, u32 arg2,
+ u32 arg3);
+int sip_smc_cpu_pm_config(u32 func, u32 id, u32 cfg);
ulong sip_cpu_logical_map_mpidr(u32 cpu);
/***************************fiq debugger **************************************/
void sip_fiq_debugger_enable_fiq(bool enable, uint32_t tgt_cpu);
@@ -360,6 +396,13 @@ static inline struct dram_addrmap_info *
return NULL;
}
+static inline int sip_smc_access_mem_os_reg(u32 func,
+ u32 id,
+ u32 *val)
+{
+ return 0;
+}
+
static inline int sip_smc_amp_config(u32 sub_func_id,
u32 arg1,
u32 arg2,
@@ -406,6 +449,19 @@ static inline struct arm_smccc_res sip_h
return tmp;
}
+static inline struct arm_smccc_res sip_smc_gpio_config(u32 sub_func_id, u32 arg1,
+ u32 arg2, u32 arg3)
+{
+ struct arm_smccc_res tmp = { .a0 = SIP_RET_NOT_SUPPORTED, };
+
+ return tmp;
+}
+
+static inline int sip_smc_cpu_pm_config(u32 func, u32 id, u32 cfg)
+{
+ return SIP_RET_NOT_SUPPORTED;
+}
+
static inline ulong sip_cpu_logical_map_mpidr(u32 cpu) { return 0; }
/***************************fiq debugger **************************************/

64
package/kernel/rockchip-drivers/patches/119-rknpu_devfreq-sync-6.6.patch Normal file
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@ -0,0 +1,64 @@
From 98feb9ac47f8aeae0e7d8cbe911ff56c27fa4f1e Mon Sep 17 00:00:00 2001
From: jjm2473 <jjm2473@gmail.com>
Date: Wed, 10 Sep 2025 13:32:17 +0800
Subject: [PATCH] rknpu_devfreq: sync from develop-6.6
---
drivers/rknpu/rknpu_devfreq.c | 19 ++++++++++++++++---
1 file changed, 16 insertions(+), 3 deletions(-)
--- a/drivers/rknpu/rknpu_devfreq.c
+++ b/drivers/rknpu/rknpu_devfreq.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright (C) Rockchip Electronics Co.Ltd
+ * Copyright (C) Rockchip Electronics Co., Ltd.
* Author: Finley Xiao <finley.xiao@rock-chips.com>
*/
@@ -120,6 +120,15 @@ static int rk3588_npu_get_soc_info(struc
else if (value == 0xa)
*bin = 2;
}
+ if (of_property_match_string(np, "nvmem-cell-names", "customer_demand") >= 0) {
+ ret = rockchip_nvmem_cell_read_u8(np, "customer_demand", &value);
+ if (ret) {
+ dev_err(dev, "Failed to get customer_demand\n");
+ return ret;
+ }
+ if (value == 0x3)
+ *bin = 4;
+ }
if (*bin < 0)
*bin = 0;
LOG_DEV_INFO(dev, "bin=%d\n", *bin);
@@ -264,6 +273,10 @@ static const struct of_device_id rockchi
.data = (void *)&rk3576_npu_opp_data,
},
{
+ .compatible = "rockchip,rk3576s",
+ .data = (void *)&rk3576_npu_opp_data,
+ },
+ {
.compatible = "rockchip,rk3588",
.data = (void *)&rk3588_npu_opp_data,
},
@@ -422,7 +435,7 @@ int rknpu_devfreq_runtime_suspend(struct
struct rknpu_device *rknpu_dev = dev_get_drvdata(dev);
struct rockchip_opp_info *opp_info = &rknpu_dev->opp_info;
- if (opp_info->is_scmi_clk) {
+ if (rockchip_opp_is_use_pvtpll(opp_info)) {
if (clk_set_rate(opp_info->clk, POWER_DOWN_FREQ))
LOG_DEV_ERROR(dev, "failed to restore clk rate\n");
}
@@ -450,7 +463,7 @@ int rknpu_devfreq_runtime_resume(struct
if (opp_info->data && opp_info->data->set_read_margin)
opp_info->data->set_read_margin(dev, opp_info,
opp_info->target_rm);
- if (opp_info->is_scmi_clk) {
+ if (rockchip_opp_is_use_pvtpll(opp_info)) {
if (clk_set_rate(opp_info->clk, rknpu_dev->current_freq))
LOG_DEV_ERROR(dev, "failed to set power down rate\n");
}

40
package/kernel/rockchip-drivers/patches/120-soc-rockchip-fix-include-path-on-OOT-build.patch Normal file
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@ -0,0 +1,40 @@
From debe29461df32518661b42bd119ddd68a54a5dc5 Mon Sep 17 00:00:00 2001
From: jjm2473 <jjm2473@gmail.com>
Date: Mon, 8 Sep 2025 12:27:39 +0800
Subject: [PATCH] soc/rockchip: fix include path on OOT build
---
drivers/soc/rockchip/rockchip_opp_select.c | 6 +++---
drivers/soc/rockchip/rockchip_system_monitor.c | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
--- a/drivers/soc/rockchip/rockchip_opp_select.c
+++ b/drivers/soc/rockchip/rockchip_opp_select.c
@@ -20,9 +20,9 @@
#include <linux/version.h>
#include <soc/rockchip/rockchip_opp_select.h>
-#include "../../clk/rockchip/clk.h"
-#include "../../opp/opp.h"
-#include "../../devfreq/governor.h"
+#include <../drivers/clk/rockchip/clk.h>
+#include <../drivers/opp/opp.h>
+#include <../drivers/devfreq/governor.h>
#define MAX_PROP_NAME_LEN 6
#define SEL_TABLE_END ~1
--- a/drivers/soc/rockchip/rockchip_system_monitor.c
+++ b/drivers/soc/rockchip/rockchip_system_monitor.c
@@ -40,9 +40,9 @@
#include <linux/earlysuspend.h>
#endif
-#include "../../opp/opp.h"
-#include "../../regulator/internal.h"
-#include "../../thermal/thermal_core.h"
+#include <../drivers/opp/opp.h>
+#include <../drivers/regulator/internal.h>
+#include <../drivers/thermal/thermal_core.h>
#define CPU_REBOOT_FREQ 816000 /* kHz */
#define VIDEO_1080P_SIZE (1920 * 1080)

46
package/kernel/rockchip-drivers/patches/121-soc-rockchip-fix-CE.patch Normal file
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@ -0,0 +1,46 @@
From 79a10b75fdfefceaf7b4f2f5e0d425c5947c8bd8 Mon Sep 17 00:00:00 2001
From: jjm2473 <jjm2473@gmail.com>
Date: Wed, 10 Sep 2025 13:17:06 +0800
Subject: [PATCH] soc/rockchip: fix ce
---
drivers/soc/rockchip/rockchip_opp_select.c | 7 +++++++
drivers/soc/rockchip/rockchip_system_monitor.c | 2 ++
2 files changed, 9 insertions(+)
--- a/drivers/soc/rockchip/rockchip_opp_select.c
+++ b/drivers/soc/rockchip/rockchip_opp_select.c
@@ -2090,8 +2090,15 @@ static int rockchip_pvtpll_set_volt_sel(
return 0;
if (!info->pvtpll_smc)
+#if IS_REACHABLE(CONFIG_ROCKCHIP_CLK_PVTPLL)
return rockchip_pvtpll_volt_sel_adjust(info->pvtpll_clk_id,
info->volt_sel);
+#else
+ {
+ WARN_ONCE(1, "CONFIG_ROCKCHIP_CLK_PVTPLL not enabled, should not going to here\n");
+ return 0;
+ }
+#endif
res = sip_smc_pvtpll_config(PVTPLL_VOLT_SEL, info->pvtpll_clk_id,
(u32)info->volt_sel, 0, 0, 0, 0);
--- a/drivers/soc/rockchip/rockchip_system_monitor.c
+++ b/drivers/soc/rockchip/rockchip_system_monitor.c
@@ -1922,6 +1922,7 @@ static void system_monitor_early_min_vol
static DECLARE_DELAYED_WORK(system_monitor_early_min_volt_work,
system_monitor_early_min_volt_function);
+#if IS_ENABLED(CONFIG_CPU_RK3506)
static int system_monitor_ddr_trefi_update(u32 ref_mode)
{
struct arm_smccc_res res;
@@ -1942,6 +1943,7 @@ static __maybe_unused int rk3506_system_
return 0;
}
+#endif
static const struct of_device_id rockchip_system_monitor_of_match[] = {
{ .compatible = "rockchip,system-monitor", .data = NULL },

27
package/kernel/rockchip-drivers/patches/122-firmware-fix-CE.patch Normal file
View File

@ -0,0 +1,27 @@
From 174713a3cc2b01324ed3cb772642fe79b1cabdfd Mon Sep 17 00:00:00 2001
From: jjm2473 <jjm2473@gmail.com>
Date: Wed, 10 Sep 2025 13:27:07 +0800
Subject: [PATCH] firmware: fix ce
---
drivers/firmware/rockchip_sip.c | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/firmware/rockchip_sip.c
+++ b/drivers/firmware/rockchip_sip.c
@@ -207,6 +207,7 @@ struct arm_smccc_res sip_smc_bus_config(
}
EXPORT_SYMBOL_GPL(sip_smc_bus_config);
+#ifdef ROCKCHIP_SIP_CONFIG_DRAM_ADDRMAP_GET
struct dram_addrmap_info *sip_smc_get_dram_map(void)
{
struct arm_smccc_res res;
@@ -236,6 +237,7 @@ struct dram_addrmap_info *sip_smc_get_dr
return map->bank_bit_first ? map : NULL;
}
EXPORT_SYMBOL_GPL(sip_smc_get_dram_map);
+#endif
struct arm_smccc_res sip_smc_lastlog_request(void)
{

30
package/kernel/rockchip-drivers/patches/123-opp-abi-compatible.patch Normal file
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@ -0,0 +1,30 @@
From 6ec703b634fe473982fef3f3b5726d501679dde9 Mon Sep 17 00:00:00 2001
From: jjm2473 <jjm2473@gmail.com>
Date: Wed, 10 Sep 2025 14:31:13 +0800
Subject: [PATCH] rockchip_opp_select.h: remove is_use_pvtpll for abi
compatible
is_use_pvtpll is only used by rv1126b_npu_opp_data
---
include/soc/rockchip/rockchip_opp_select.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
--- a/include/soc/rockchip/rockchip_opp_select.h
+++ b/include/soc/rockchip/rockchip_opp_select.h
@@ -44,7 +44,6 @@ struct volt_rm_table {
struct rockchip_opp_data {
config_clks_t config_clks;
config_regulators_t config_regulators;
- bool is_use_pvtpll;
int (*get_soc_info)(struct device *dev, struct device_node *np,
int *bin, int *process);
@@ -146,7 +145,7 @@ struct rockchip_opp_info {
static inline bool rockchip_opp_is_use_pvtpll(struct rockchip_opp_info *info)
{
- return (info->is_scmi_clk || (info->data && info->data->is_use_pvtpll));
+ return (info->is_scmi_clk);
}
#if IS_ENABLED(CONFIG_ROCKCHIP_OPP)

4
package/kernel/rockchip-drivers/src/drivers/Makefile Normal file
View File

@ -0,0 +1,4 @@
obj-y += firmware/
obj-y += soc/rockchip/
obj-y += video/rockchip/
obj-y += rknpu/

326
package/kernel/rockchip-drivers/src/drivers/firmware/Kconfig Normal file
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@ -0,0 +1,326 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# For a description of the syntax of this configuration file,
# see Documentation/kbuild/kconfig-language.rst.
#
menu "Firmware Drivers"
source "drivers/firmware/arm_scmi/Kconfig"
config ARM_SCPI_PROTOCOL
tristate "ARM System Control and Power Interface (SCPI) Message Protocol"
depends on ARM || ARM64 || COMPILE_TEST
depends on MAILBOX
help
System Control and Power Interface (SCPI) Message Protocol is
defined for the purpose of communication between the Application
Cores(AP) and the System Control Processor(SCP). The MHU peripheral
provides a mechanism for inter-processor communication between SCP
and AP.
SCP controls most of the power management on the Application
Processors. It offers control and management of: the core/cluster
power states, various power domain DVFS including the core/cluster,
certain system clocks configuration, thermal sensors and many
others.
This protocol library provides interface for all the client drivers
making use of the features offered by the SCP.
config ARM_SCPI_POWER_DOMAIN
tristate "SCPI power domain driver"
depends on ARM_SCPI_PROTOCOL || (COMPILE_TEST && OF)
default y
select PM_GENERIC_DOMAINS if PM
help
This enables support for the SCPI power domains which can be
enabled or disabled via the SCP firmware
config ARM_SDE_INTERFACE
bool "ARM Software Delegated Exception Interface (SDEI)"
depends on ARM64
depends on ACPI_APEI_GHES
help
The Software Delegated Exception Interface (SDEI) is an ARM
standard for registering callbacks from the platform firmware
into the OS. This is typically used to implement RAS notifications.
config EDD
tristate "BIOS Enhanced Disk Drive calls determine boot disk"
depends on X86
help
Say Y or M here if you want to enable BIOS Enhanced Disk Drive
Services real mode BIOS calls to determine which disk
BIOS tries boot from. This information is then exported via sysfs.
This option is experimental and is known to fail to boot on some
obscure configurations. Most disk controller BIOS vendors do
not yet implement this feature.
config EDD_OFF
bool "Sets default behavior for EDD detection to off"
depends on EDD
default n
help
Say Y if you want EDD disabled by default, even though it is compiled into the
kernel. Say N if you want EDD enabled by default. EDD can be dynamically set
using the kernel parameter 'edd={on|skipmbr|off}'.
config FIRMWARE_MEMMAP
bool "Add firmware-provided memory map to sysfs" if EXPERT
default X86
help
Add the firmware-provided (unmodified) memory map to /sys/firmware/memmap.
That memory map is used for example by kexec to set up parameter area
for the next kernel, but can also be used for debugging purposes.
See also Documentation/ABI/testing/sysfs-firmware-memmap.
config EFI_PCDP
bool "Console device selection via EFI PCDP or HCDP table"
depends on ACPI && EFI && IA64
default y if IA64
help
If your firmware supplies the PCDP table, and you want to
automatically use the primary console device it describes
as the Linux console, say Y here.
If your firmware supplies the HCDP table, and you want to
use the first serial port it describes as the Linux console,
say Y here. If your EFI ConOut path contains only a UART
device, it will become the console automatically. Otherwise,
you must specify the "console=hcdp" kernel boot argument.
Neither the PCDP nor the HCDP affects naming of serial devices,
so a serial console may be /dev/ttyS0, /dev/ttyS1, etc, depending
on how the driver discovers devices.
You must also enable the appropriate drivers (serial, VGA, etc.)
See DIG64_HCDPv20_042804.pdf available from
<http://www.dig64.org/specifications/>
config DMIID
bool "Export DMI identification via sysfs to userspace"
depends on DMI
default y
help
Say Y here if you want to query SMBIOS/DMI system identification
information from userspace through /sys/class/dmi/id/ or if you want
DMI-based module auto-loading.
config DMI_SYSFS
tristate "DMI table support in sysfs"
depends on SYSFS && DMI
default n
help
Say Y or M here to enable the exporting of the raw DMI table
data via sysfs. This is useful for consuming the data without
requiring any access to /dev/mem at all. Tables are found
under /sys/firmware/dmi when this option is enabled and
loaded.
config DMI_SCAN_MACHINE_NON_EFI_FALLBACK
bool
config ISCSI_IBFT_FIND
bool "iSCSI Boot Firmware Table Attributes"
depends on X86 && ISCSI_IBFT
default n
help
This option enables the kernel to find the region of memory
in which the ISCSI Boot Firmware Table (iBFT) resides. This
is necessary for iSCSI Boot Firmware Table Attributes module to work
properly.
config ISCSI_IBFT
tristate "iSCSI Boot Firmware Table Attributes module"
select ISCSI_BOOT_SYSFS
select ISCSI_IBFT_FIND if X86
depends on ACPI && SCSI && SCSI_LOWLEVEL
default n
help
This option enables support for detection and exposing of iSCSI
Boot Firmware Table (iBFT) via sysfs to userspace. If you wish to
detect iSCSI boot parameters dynamically during system boot, say Y.
Otherwise, say N.
config RASPBERRYPI_FIRMWARE
tristate "Raspberry Pi Firmware Driver"
depends on BCM2835_MBOX
help
This option enables support for communicating with the firmware on the
Raspberry Pi.
config FW_CFG_SYSFS
tristate "QEMU fw_cfg device support in sysfs"
depends on SYSFS && (ARM || ARM64 || PARISC || PPC_PMAC || SPARC || X86)
depends on HAS_IOPORT_MAP
default n
help
Say Y or M here to enable the exporting of the QEMU firmware
configuration (fw_cfg) file entries via sysfs. Entries are
found under /sys/firmware/fw_cfg when this option is enabled
and loaded.
config FW_CFG_SYSFS_CMDLINE
bool "QEMU fw_cfg device parameter parsing"
depends on FW_CFG_SYSFS
help
Allow the qemu_fw_cfg device to be initialized via the kernel
command line or using a module parameter.
WARNING: Using incorrect parameters (base address in particular)
may crash your system.
config INTEL_STRATIX10_SERVICE
tristate "Intel Stratix10 Service Layer"
depends on ARCH_INTEL_SOCFPGA && ARM64 && HAVE_ARM_SMCCC
default n
help
Intel Stratix10 service layer runs at privileged exception level,
interfaces with the service providers (FPGA manager is one of them)
and manages secure monitor call to communicate with secure monitor
software at secure monitor exception level.
Say Y here if you want Stratix10 service layer support.
config INTEL_STRATIX10_RSU
tristate "Intel Stratix10 Remote System Update"
depends on INTEL_STRATIX10_SERVICE
help
The Intel Remote System Update (RSU) driver exposes interfaces
access through the Intel Service Layer to user space via sysfs
device attribute nodes. The RSU interfaces report/control some of
the optional RSU features of the Stratix 10 SoC FPGA.
The RSU provides a way for customers to update the boot
configuration of a Stratix 10 SoC device with significantly reduced
risk of corrupting the bitstream storage and bricking the system.
Enable RSU support if you are using an Intel SoC FPGA with the RSU
feature enabled and you want Linux user space control.
Say Y here if you want Intel RSU support.
config MTK_ADSP_IPC
tristate "MTK ADSP IPC Protocol driver"
depends on MTK_ADSP_MBOX
help
Say yes here to add support for the MediaTek ADSP IPC
between host AP (Linux) and the firmware running on ADSP.
ADSP exists on some mtk processors.
Client might use shared memory to exchange information with ADSP.
config QCOM_SCM
tristate
config QCOM_SCM_DOWNLOAD_MODE_DEFAULT
bool "Qualcomm download mode enabled by default"
depends on QCOM_SCM
help
A device with "download mode" enabled will upon an unexpected
warm-restart enter a special debug mode that allows the user to
"download" memory content over USB for offline postmortem analysis.
The feature can be enabled/disabled on the kernel command line.
Say Y here to enable "download mode" by default.
config ROCKCHIP_SIP
tristate "Rockchip SIP interface"
depends on HAVE_ARM_SMCCC && ARCH_ROCKCHIP
help
Say Y here if you want to enable SIP callbacks for Rockchip platforms
This option enables support for communicating with the ATF.
config SYSFB
bool
select BOOT_VESA_SUPPORT
select SCREEN_INFO
config SYSFB_SIMPLEFB
bool "Mark VGA/VBE/EFI FB as generic system framebuffer"
depends on X86 || EFI
select SYSFB
help
Firmwares often provide initial graphics framebuffers so the BIOS,
bootloader or kernel can show basic video-output during boot for
user-guidance and debugging. Historically, x86 used the VESA BIOS
Extensions and EFI-framebuffers for this, which are mostly limited
to x86 BIOS or EFI systems.
This option, if enabled, marks VGA/VBE/EFI framebuffers as generic
framebuffers so the new generic system-framebuffer drivers can be
used instead. If the framebuffer is not compatible with the generic
modes, it is advertised as fallback platform framebuffer so legacy
drivers like efifb, vesafb and uvesafb can pick it up.
If this option is not selected, all system framebuffers are always
marked as fallback platform framebuffers as usual.
Note: Legacy fbdev drivers, including vesafb, efifb, uvesafb, will
not be able to pick up generic system framebuffers if this option
is selected. You are highly encouraged to enable simplefb as
replacement if you select this option. simplefb can correctly deal
with generic system framebuffers. But you should still keep vesafb
and others enabled as fallback if a system framebuffer is
incompatible with simplefb.
If unsure, say Y.
config TI_SCI_PROTOCOL
tristate "TI System Control Interface (TISCI) Message Protocol"
depends on TI_MESSAGE_MANAGER
help
TI System Control Interface (TISCI) Message Protocol is used to manage
compute systems such as ARM, DSP etc with the system controller in
complex System on Chip(SoC) such as those found on certain keystone
generation SoC from TI.
System controller provides various facilities including power
management function support.
This protocol library is used by client drivers to use the features
provided by the system controller.
config TRUSTED_FOUNDATIONS
bool "Trusted Foundations secure monitor support"
depends on ARM && CPU_V7
help
Some devices (including most early Tegra-based consumer devices on
the market) are booted with the Trusted Foundations secure monitor
active, requiring some core operations to be performed by the secure
monitor instead of the kernel.
This option allows the kernel to invoke the secure monitor whenever
required on devices using Trusted Foundations. See the functions and
comments in linux/firmware/trusted_foundations.h or the device tree
bindings for "tlm,trusted-foundations" for details on how to use it.
Choose N if you don't know what this is about.
config TURRIS_MOX_RWTM
tristate "Turris Mox rWTM secure firmware driver"
depends on ARCH_MVEBU || COMPILE_TEST
depends on HAS_DMA && OF
depends on MAILBOX
select HW_RANDOM
select ARMADA_37XX_RWTM_MBOX
help
This driver communicates with the firmware on the Cortex-M3 secure
processor of the Turris Mox router. Enable if you are building for
Turris Mox, and you will be able to read the device serial number and
other manufacturing data and also utilize the Entropy Bit Generator
for hardware random number generation.
source "drivers/firmware/arm_ffa/Kconfig"
source "drivers/firmware/broadcom/Kconfig"
source "drivers/firmware/cirrus/Kconfig"
source "drivers/firmware/google/Kconfig"
source "drivers/firmware/efi/Kconfig"
source "drivers/firmware/imx/Kconfig"
source "drivers/firmware/meson/Kconfig"
source "drivers/firmware/psci/Kconfig"
source "drivers/firmware/smccc/Kconfig"
source "drivers/firmware/tegra/Kconfig"
source "drivers/firmware/xilinx/Kconfig"
endmenu

7
package/kernel/rockchip-drivers/src/drivers/firmware/Makefile Normal file
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@ -0,0 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
#
# Makefile for the linux kernel.
#
obj-$(CONFIG_ROCKCHIP_SIP) += rockchip_sip.o

772
package/kernel/rockchip-drivers/src/drivers/firmware/rockchip_sip.c Normal file
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@ -0,0 +1,772 @@
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Copyright (C) 2016, Fuzhou Rockchip Electronics Co., Ltd
*/
#include <linux/arm-smccc.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/rockchip/rockchip_sip.h>
#include <asm/cputype.h>
#ifdef CONFIG_ARM
#include <asm/psci.h>
#endif
#include <asm/smp_plat.h>
#include <uapi/linux/psci.h>
#include <linux/ptrace.h>
#include <linux/sched/clock.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <soc/rockchip/rockchip_sip.h>
#ifdef CONFIG_64BIT
#define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN64_##name
#else
#define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN_##name
#endif
#define SIZE_PAGE(n) ((n) << 12)
static struct arm_smccc_res __invoke_sip_fn_smc(unsigned long function_id,
unsigned long arg0,
unsigned long arg1,
unsigned long arg2)
{
struct arm_smccc_res res;
arm_smccc_smc(function_id, arg0, arg1, arg2, 0, 0, 0, 0, &res);
return res;
}
struct arm_smccc_res sip_smc_dram(u32 arg0, u32 arg1, u32 arg2)
{
return __invoke_sip_fn_smc(SIP_DRAM_CONFIG, arg0, arg1, arg2);
}
EXPORT_SYMBOL_GPL(sip_smc_dram);
struct arm_smccc_res sip_smc_get_atf_version(void)
{
return __invoke_sip_fn_smc(SIP_ATF_VERSION, 0, 0, 0);
}
EXPORT_SYMBOL_GPL(sip_smc_get_atf_version);
struct arm_smccc_res sip_smc_get_sip_version(void)
{
return __invoke_sip_fn_smc(SIP_SIP_VERSION, 0, 0, 0);
}
EXPORT_SYMBOL_GPL(sip_smc_get_sip_version);
int sip_smc_set_suspend_mode(u32 ctrl, u32 config1, u32 config2)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(SIP_SUSPEND_MODE, ctrl, config1, config2);
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_smc_set_suspend_mode);
struct arm_smccc_res sip_smc_get_suspend_info(u32 info)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(SIP_SUSPEND_MODE, info, 0, 0);
return res;
}
EXPORT_SYMBOL_GPL(sip_smc_get_suspend_info);
int sip_smc_virtual_poweroff(void)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(PSCI_FN_NATIVE(1_0, SYSTEM_SUSPEND), 0, 0, 0);
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_smc_virtual_poweroff);
int sip_smc_remotectl_config(u32 func, u32 data)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(SIP_REMOTECTL_CFG, func, data, 0);
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_smc_remotectl_config);
u32 sip_smc_secure_reg_read(u32 addr_phy)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(SIP_ACCESS_REG, 0, addr_phy, SECURE_REG_RD);
if (res.a0)
pr_err("%s error: %d, addr phy: 0x%x\n",
__func__, (int)res.a0, addr_phy);
return res.a1;
}
EXPORT_SYMBOL_GPL(sip_smc_secure_reg_read);
int sip_smc_secure_reg_write(u32 addr_phy, u32 val)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(SIP_ACCESS_REG, val, addr_phy, SECURE_REG_WR);
if (res.a0)
pr_err("%s error: %d, addr phy: 0x%x\n",
__func__, (int)res.a0, addr_phy);
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_smc_secure_reg_write);
static void *sip_map(phys_addr_t start, size_t size)
{
struct page **pages;
phys_addr_t page_start;
unsigned int page_count;
pgprot_t prot;
unsigned int i;
void *vaddr;
if (!pfn_valid(__phys_to_pfn(start)))
return ioremap(start, size);
page_start = start - offset_in_page(start);
page_count = DIV_ROUND_UP(size + offset_in_page(start), PAGE_SIZE);
prot = pgprot_noncached(PAGE_KERNEL);
pages = kmalloc_array(page_count, sizeof(struct page *), GFP_KERNEL);
if (!pages) {
pr_err("%s: Failed to allocate array for %u pages\n",
__func__, page_count);
return NULL;
}
for (i = 0; i < page_count; i++)
pages[i] = phys_to_page(page_start + i * PAGE_SIZE);
vaddr = vmap(pages, page_count, VM_MAP, prot);
kfree(pages);
/*
* Since vmap() uses page granularity, we must add the offset
* into the page here, to get the byte granularity address
* into the mapping to represent the actual "start" location.
*/
return vaddr + offset_in_page(start);
}
struct arm_smccc_res sip_smc_request_share_mem(u32 page_num,
share_page_type_t page_type)
{
struct arm_smccc_res res;
unsigned long share_mem_phy;
res = __invoke_sip_fn_smc(SIP_SHARE_MEM, page_num, page_type, 0);
if (IS_SIP_ERROR(res.a0))
goto error;
share_mem_phy = res.a1;
res.a1 = (unsigned long)sip_map(share_mem_phy, SIZE_PAGE(page_num));
error:
return res;
}
EXPORT_SYMBOL_GPL(sip_smc_request_share_mem);
struct arm_smccc_res sip_smc_mcu_el3fiq(u32 arg0, u32 arg1, u32 arg2)
{
return __invoke_sip_fn_smc(SIP_MCU_EL3FIQ_CFG, arg0, arg1, arg2);
}
EXPORT_SYMBOL_GPL(sip_smc_mcu_el3fiq);
struct arm_smccc_res sip_smc_vpu_reset(u32 arg0, u32 arg1, u32 arg2)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(PSCI_SIP_VPU_RESET, arg0, arg1, arg2);
return res;
}
EXPORT_SYMBOL_GPL(sip_smc_vpu_reset);
struct arm_smccc_res sip_smc_bus_config(u32 arg0, u32 arg1, u32 arg2)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(SIP_BUS_CFG, arg0, arg1, arg2);
return res;
}
EXPORT_SYMBOL_GPL(sip_smc_bus_config);
struct dram_addrmap_info *sip_smc_get_dram_map(void)
{
struct arm_smccc_res res;
static struct dram_addrmap_info *map;
struct dram_addrmap_info *m;
if (map)
return map->bank_bit_first ? map : NULL;
/* Request share memory size 4KB */
res = sip_smc_request_share_mem(1, SHARE_PAGE_TYPE_DDR_ADDRMAP);
if (res.a0 != 0) {
pr_err("%s: request share memory error!\n", __func__);
return NULL;
}
m = (struct dram_addrmap_info *)res.a1;
memset_io(m, 0x0, sizeof(*m));
res = sip_smc_dram(SHARE_PAGE_TYPE_DDR_ADDRMAP, 0,
ROCKCHIP_SIP_CONFIG_DRAM_ADDRMAP_GET);
if (res.a0) {
pr_err("rockchip_sip_config_dram_addrmap_get error:%lx\n", res.a0);
return NULL;
}
map = m;
return map->bank_bit_first ? map : NULL;
}
EXPORT_SYMBOL_GPL(sip_smc_get_dram_map);
struct arm_smccc_res sip_smc_lastlog_request(void)
{
struct arm_smccc_res res;
void __iomem *addr1, *addr2;
res = __invoke_sip_fn_smc(SIP_LAST_LOG, local_clock(), 0, 0);
if (IS_SIP_ERROR(res.a0))
return res;
addr1 = sip_map(res.a1, res.a3);
if (!addr1) {
pr_err("%s: share memory buffer0 ioremap failed\n", __func__);
res.a0 = SIP_RET_INVALID_ADDRESS;
return res;
}
addr2 = sip_map(res.a2, res.a3);
if (!addr2) {
pr_err("%s: share memory buffer1 ioremap failed\n", __func__);
res.a0 = SIP_RET_INVALID_ADDRESS;
return res;
}
res.a1 = (unsigned long)addr1;
res.a2 = (unsigned long)addr2;
return res;
}
EXPORT_SYMBOL_GPL(sip_smc_lastlog_request);
int sip_smc_access_mem_os_reg(u32 func, u32 id, u32 *val)
{
struct arm_smccc_res res;
if (val == NULL)
return SIP_RET_INVALID_PARAMS;
res = __invoke_sip_fn_smc(SIP_ACCESS_MEM_OS_REG, func, id, *val);
if (func == RK_MEM_OS_REG_READ)
*val = res.a1;
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_smc_access_mem_os_reg);
int sip_smc_amp_config(u32 sub_func_id, u32 arg1, u32 arg2, u32 arg3)
{
struct arm_smccc_res res;
arm_smccc_smc(RK_SIP_AMP_CFG, sub_func_id, arg1, arg2, arg3,
0, 0, 0, &res);
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_smc_amp_config);
struct arm_smccc_res sip_smc_get_amp_info(u32 sub_func_id, u32 arg1)
{
struct arm_smccc_res res;
arm_smccc_smc(RK_SIP_AMP_CFG, sub_func_id, arg1, 0, 0, 0, 0, 0, &res);
return res;
}
EXPORT_SYMBOL_GPL(sip_smc_get_amp_info);
struct arm_smccc_res sip_smc_get_pvtpll_info(u32 sub_func_id, u32 arg1)
{
struct arm_smccc_res res;
/*
* res.a0: error code(0: success, !0: error).
* res.a1: low temp config flag(0: support, !0: don't support).
*/
arm_smccc_smc(SIP_PVTPLL_CFG, sub_func_id, arg1, 0, 0, 0, 0, 0, &res);
return res;
}
EXPORT_SYMBOL_GPL(sip_smc_get_pvtpll_info);
struct arm_smccc_res sip_smc_pvtpll_config(u32 sub_func_id, u32 arg1, u32 arg2,
u32 arg3, u32 arg4, u32 arg5, u32 arg6)
{
struct arm_smccc_res res;
/*
* res.a0: error code(0: success, !0: error).
*/
arm_smccc_smc(SIP_PVTPLL_CFG, sub_func_id, arg1, arg2, arg3, arg4, arg5,
arg6, &res);
return res;
}
EXPORT_SYMBOL_GPL(sip_smc_pvtpll_config);
void __iomem *sip_hdcp_request_share_memory(int id)
{
static void __iomem *base;
struct arm_smccc_res res;
if (id < 0 || id >= MAX_DEVICE) {
pr_err("%s: invalid device id\n", __func__);
return NULL;
}
if (!base) {
/* request page share memory */
res = sip_smc_request_share_mem(2, SHARE_PAGE_TYPE_HDCP);
if (IS_SIP_ERROR(res.a0))
return NULL;
base = (void __iomem *)res.a1;
}
return base + id * 1024;
}
EXPORT_SYMBOL_GPL(sip_hdcp_request_share_memory);
struct arm_smccc_res sip_hdcp_config(u32 arg0, u32 arg1, u32 arg2)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(SIP_HDCP_CONFIG, arg0, arg1, arg2);
return res;
}
EXPORT_SYMBOL_GPL(sip_hdcp_config);
struct arm_smccc_res sip_smc_gpio_config(u32 sub_func_id, u32 arg1, u32 arg2,
u32 arg3)
{
struct arm_smccc_res res;
/*
* res.a0: error code(0: success, !0: error).
*/
arm_smccc_smc(SIP_GPIO_CFG, sub_func_id, arg1, arg2, arg3, 0, 0, 0, &res);
return res;
}
EXPORT_SYMBOL_GPL(sip_smc_gpio_config);
int sip_smc_cpu_pm_config(u32 func, u32 id, u32 cfg)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(SIP_CPU_PM_CFG, func, id, cfg);
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_smc_cpu_pm_config);
/************************** fiq debugger **************************************/
/*
* AArch32 is not allowed to call SMC64(ATF framework does not support), so we
* don't change SIP_UARTDBG_FN to SIP_UARTDBG_CFG64 even when cpu is AArch32
* mode. Let ATF support SIP_UARTDBG_CFG, and we just initialize SIP_UARTDBG_FN
* depends on compile option(CONFIG_ARM or CONFIG_ARM64).
*/
#ifdef CONFIG_ARM64
#define SIP_UARTDBG_FN SIP_UARTDBG_CFG64
#define SIP_FIQ_DBG_STACK_SIZE IRQ_STACK_SIZE
#else
#define SIP_UARTDBG_FN SIP_UARTDBG_CFG
#define SIP_FIQ_DBG_STACK_SIZE SZ_8K
static int firmware_64_32bit;
#endif
static int fiq_sip_enabled;
static int fiq_target_cpu;
static unsigned long fiq_stack_top;
static phys_addr_t ft_fiq_mem_phy;
static void __iomem *ft_fiq_mem_base;
static sip_fiq_debugger_uart_irq_tf_cb_t sip_fiq_debugger_uart_irq_tf;
static struct pt_regs fiq_pt_regs;
int sip_fiq_debugger_is_enabled(void)
{
return fiq_sip_enabled;
}
EXPORT_SYMBOL_GPL(sip_fiq_debugger_is_enabled);
static void sip_fiq_debugger_get_pt_regs(void *reg_base,
unsigned long sp_el1)
{
__maybe_unused struct sm_nsec_ctx *nsec_ctx = reg_base;
__maybe_unused struct gp_regs_ctx *gp_regs = reg_base;
#ifdef CONFIG_ARM64
/*
* 64-bit ATF + 64-bit kernel
*/
/* copy cpu context: x0 ~ spsr_el3 */
memcpy(&fiq_pt_regs, reg_base, 8 * 31);
/* copy pstate: spsr_el3 */
memcpy(&fiq_pt_regs.pstate, reg_base + 0x110, 8);
fiq_pt_regs.sp = sp_el1;
/* copy pc: elr_el3 */
memcpy(&fiq_pt_regs.pc, reg_base + 0x118, 8);
#else
if (firmware_64_32bit == FIRMWARE_ATF_64BIT) {
/*
* 64-bit ATF + 32-bit kernel
*/
fiq_pt_regs.ARM_r0 = gp_regs->x0;
fiq_pt_regs.ARM_r1 = gp_regs->x1;
fiq_pt_regs.ARM_r2 = gp_regs->x2;
fiq_pt_regs.ARM_r3 = gp_regs->x3;
fiq_pt_regs.ARM_r4 = gp_regs->x4;
fiq_pt_regs.ARM_r5 = gp_regs->x5;
fiq_pt_regs.ARM_r6 = gp_regs->x6;
fiq_pt_regs.ARM_r7 = gp_regs->x7;
fiq_pt_regs.ARM_r8 = gp_regs->x8;
fiq_pt_regs.ARM_r9 = gp_regs->x9;
fiq_pt_regs.ARM_r10 = gp_regs->x10;
fiq_pt_regs.ARM_fp = gp_regs->x11;
fiq_pt_regs.ARM_ip = gp_regs->x12;
fiq_pt_regs.ARM_sp = gp_regs->x19; /* aarch32 svc_r13 */
fiq_pt_regs.ARM_lr = gp_regs->x18; /* aarch32 svc_r14 */
fiq_pt_regs.ARM_cpsr = gp_regs->spsr_el3;
fiq_pt_regs.ARM_pc = gp_regs->elr_el3;
} else {
/*
* 32-bit tee firmware + 32-bit kernel
*/
fiq_pt_regs.ARM_r0 = nsec_ctx->r0;
fiq_pt_regs.ARM_r1 = nsec_ctx->r1;
fiq_pt_regs.ARM_r2 = nsec_ctx->r2;
fiq_pt_regs.ARM_r3 = nsec_ctx->r3;
fiq_pt_regs.ARM_r4 = nsec_ctx->r4;
fiq_pt_regs.ARM_r5 = nsec_ctx->r5;
fiq_pt_regs.ARM_r6 = nsec_ctx->r6;
fiq_pt_regs.ARM_r7 = nsec_ctx->r7;
fiq_pt_regs.ARM_r8 = nsec_ctx->r8;
fiq_pt_regs.ARM_r9 = nsec_ctx->r9;
fiq_pt_regs.ARM_r10 = nsec_ctx->r10;
fiq_pt_regs.ARM_fp = nsec_ctx->r11;
fiq_pt_regs.ARM_ip = nsec_ctx->r12;
fiq_pt_regs.ARM_sp = nsec_ctx->svc_sp;
fiq_pt_regs.ARM_lr = nsec_ctx->svc_lr;
fiq_pt_regs.ARM_cpsr = nsec_ctx->mon_spsr;
/*
* 'nsec_ctx->mon_lr' is not the fiq break point's PC, because it will
* be override as 'psci_fiq_debugger_uart_irq_tf_cb' for optee-os to
* jump to fiq_debugger handler.
*
* As 'nsec_ctx->und_lr' is not used for kernel, so optee-os uses it to
* deliver fiq break point's PC.
*
*/
fiq_pt_regs.ARM_pc = nsec_ctx->und_lr;
}
#endif
}
static void sip_fiq_debugger_uart_irq_tf_cb(unsigned long sp_el1,
unsigned long offset,
unsigned long cpu)
{
char *cpu_context;
/* calling fiq handler */
if (ft_fiq_mem_base) {
cpu_context = (char *)ft_fiq_mem_base + offset;
sip_fiq_debugger_get_pt_regs(cpu_context, sp_el1);
sip_fiq_debugger_uart_irq_tf(&fiq_pt_regs, cpu);
}
/* fiq handler done, return to EL3(then EL3 return to EL1 entry) */
__invoke_sip_fn_smc(SIP_UARTDBG_FN, 0, 0, UARTDBG_CFG_OSHDL_TO_OS);
}
int sip_fiq_debugger_uart_irq_tf_init(u32 irq_id, sip_fiq_debugger_uart_irq_tf_cb_t callback_fn)
{
struct arm_smccc_res res;
/* Alloc a page for fiq_debugger's stack */
if (fiq_stack_top == 0) {
fiq_stack_top = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
get_order(SIP_FIQ_DBG_STACK_SIZE));
if (fiq_stack_top) {
fiq_stack_top += SIP_FIQ_DBG_STACK_SIZE;
} else {
pr_err("%s: alloc stack failed\n", __func__);
return -ENOMEM;
}
}
/* init fiq debugger callback */
sip_fiq_debugger_uart_irq_tf = callback_fn;
arm_smccc_smc(SIP_UARTDBG_FN,
irq_id,
(unsigned long)sip_fiq_debugger_uart_irq_tf_cb,
UARTDBG_CFG_INIT,
fiq_stack_top, 0, 0, 0, &res);
if (IS_SIP_ERROR(res.a0)) {
pr_err("%s error: %d\n", __func__, (int)res.a0);
return res.a0;
}
/* share memory ioremap */
if (!ft_fiq_mem_base) {
ft_fiq_mem_phy = res.a1;
ft_fiq_mem_base = sip_map(ft_fiq_mem_phy,
FIQ_UARTDBG_SHARE_MEM_SIZE);
if (!ft_fiq_mem_base) {
pr_err("%s: share memory ioremap failed\n", __func__);
return -ENOMEM;
}
}
fiq_sip_enabled = 1;
return SIP_RET_SUCCESS;
}
EXPORT_SYMBOL_GPL(sip_fiq_debugger_uart_irq_tf_init);
static ulong cpu_logical_map_mpidr(u32 cpu)
{
#ifdef MODULE
/* Empirically, local "cpu_logical_map()" for rockchip platforms */
ulong mpidr = read_cpuid_mpidr();
if (mpidr & MPIDR_MT_BITMASK) {
/* 0x100, 0x200, 0x300, 0x400 ... */
mpidr = (cpu & 0xff) << 8;
} else {
if (cpu < 4)
/* 0x00, 0x01, 0x02, 0x03 */
mpidr = cpu;
else if (cpu < 8)
/* 0x100, 0x101, 0x102, 0x103 */
mpidr = 0x100 | (cpu - 4);
else
pr_err("Unsupported map cpu: %d\n", cpu);
}
return mpidr;
#else
return cpu_logical_map(cpu);
#endif
}
ulong sip_cpu_logical_map_mpidr(u32 cpu)
{
return cpu_logical_map_mpidr(cpu);
}
EXPORT_SYMBOL_GPL(sip_cpu_logical_map_mpidr);
int sip_fiq_debugger_switch_cpu(u32 cpu)
{
struct arm_smccc_res res;
fiq_target_cpu = cpu;
res = __invoke_sip_fn_smc(SIP_UARTDBG_FN, cpu_logical_map_mpidr(cpu),
0, UARTDBG_CFG_OSHDL_CPUSW);
return res.a0;
}
int sip_fiq_debugger_sdei_switch_cpu(u32 cur_cpu, u32 target_cpu, u32 flag)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(SIP_SDEI_FIQ_DBG_SWITCH_CPU,
cur_cpu, target_cpu, flag);
return res.a0;
}
int sip_fiq_debugger_sdei_get_event_id(u32 *fiq, u32 *sw_cpu, u32 *flag)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(SIP_SDEI_FIQ_DBG_GET_EVENT_ID,
0, 0, 0);
*fiq = res.a1;
*sw_cpu = res.a2;
if (flag)
*flag = res.a3;
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_fiq_debugger_switch_cpu);
void sip_fiq_debugger_enable_debug(bool enable)
{
unsigned long val;
val = enable ? UARTDBG_CFG_OSHDL_DEBUG_ENABLE :
UARTDBG_CFG_OSHDL_DEBUG_DISABLE;
__invoke_sip_fn_smc(SIP_UARTDBG_FN, 0, 0, val);
}
EXPORT_SYMBOL_GPL(sip_fiq_debugger_enable_debug);
int sip_fiq_debugger_set_print_port(u32 port_phyaddr, u32 baudrate)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(SIP_UARTDBG_FN, port_phyaddr, baudrate,
UARTDBG_CFG_PRINT_PORT);
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_fiq_debugger_set_print_port);
int sip_fiq_debugger_request_share_memory(void)
{
struct arm_smccc_res res;
/* request page share memory */
res = sip_smc_request_share_mem(FIQ_UARTDBG_PAGE_NUMS,
SHARE_PAGE_TYPE_UARTDBG);
if (IS_SIP_ERROR(res.a0))
return res.a0;
return SIP_RET_SUCCESS;
}
EXPORT_SYMBOL_GPL(sip_fiq_debugger_request_share_memory);
int sip_fiq_debugger_get_target_cpu(void)
{
return fiq_target_cpu;
}
EXPORT_SYMBOL_GPL(sip_fiq_debugger_get_target_cpu);
void sip_fiq_debugger_enable_fiq(bool enable, uint32_t tgt_cpu)
{
u32 en;
fiq_target_cpu = tgt_cpu;
en = enable ? UARTDBG_CFG_FIQ_ENABEL : UARTDBG_CFG_FIQ_DISABEL;
__invoke_sip_fn_smc(SIP_UARTDBG_FN, tgt_cpu, 0, en);
}
EXPORT_SYMBOL_GPL(sip_fiq_debugger_enable_fiq);
int sip_fiq_control(u32 sub_func, u32 irq, unsigned long data)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(RK_SIP_FIQ_CTRL,
sub_func, irq, data);
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_fiq_control);
int sip_wdt_config(u32 sub_func, u32 arg1, u32 arg2, u32 arg3)
{
struct arm_smccc_res res;
arm_smccc_smc(SIP_WDT_CFG, sub_func, arg1, arg2, arg3,
0, 0, 0, &res);
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_wdt_config);
int sip_hdmirx_config(u32 sub_func, u32 arg1, u32 arg2, u32 arg3)
{
struct arm_smccc_res res;
arm_smccc_smc(SIP_HDMIRX_CFG, sub_func, arg1, arg2, arg3,
0, 0, 0, &res);
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_hdmirx_config);
int sip_hdcpkey_init(u32 hdcp_id)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(TRUSTED_OS_HDCPKEY_INIT, hdcp_id, 0, 0);
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_hdcpkey_init);
int sip_smc_mcu_config(unsigned long mcu_id,
unsigned long func,
unsigned long arg2)
{
struct arm_smccc_res res;
res = __invoke_sip_fn_smc(SIP_MCU_CFG, mcu_id, func, arg2);
return res.a0;
}
EXPORT_SYMBOL_GPL(sip_smc_mcu_config);
/******************************************************************************/
#ifdef CONFIG_ARM
static __init int sip_firmware_init(void)
{
struct arm_smccc_res res;
if (!psci_smp_available())
return 0;
/*
* OP-TEE works on kernel 3.10 and 4.4 and we have different sip
* implement. We should tell OP-TEE the current rockchip sip version.
*/
res = __invoke_sip_fn_smc(SIP_SIP_VERSION, SIP_IMPLEMENT_V2,
SECURE_REG_WR, 0);
if (IS_SIP_ERROR(res.a0))
pr_err("%s: set rockchip sip version v2 failed\n", __func__);
/*
* Currently, we support:
*
* 1. 64-bit ATF + 64-bit kernel;
* 2. 64-bit ATF + 32-bit kernel;
* 3. 32-bit TEE + 32-bit kernel;
*
* We need to detect which case of above and record in firmware_64_32bit
* We get info from cpuid and compare with all supported ARMv7 cpu.
*/
switch (read_cpuid_part()) {
case ARM_CPU_PART_CORTEX_A7:
case ARM_CPU_PART_CORTEX_A8:
case ARM_CPU_PART_CORTEX_A9:
case ARM_CPU_PART_CORTEX_A12:
case ARM_CPU_PART_CORTEX_A15:
case ARM_CPU_PART_CORTEX_A17:
firmware_64_32bit = FIRMWARE_TEE_32BIT;
break;
default:
firmware_64_32bit = FIRMWARE_ATF_64BIT;
break;
}
return 0;
}
arch_initcall(sip_firmware_init);
#endif
MODULE_DESCRIPTION("Rockchip SIP Call");
MODULE_LICENSE("GPL");

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# SPDX-License-Identifier: GPL-2.0-only
if ARCH_ROCKCHIP || COMPILE_TEST
menu "Rockchip SoC drivers"
source "drivers/soc/rockchip/Kconfig.cpu"
#
# Rockchip Android Features
#
config NO_GKI
bool "Disable Android GKI support"
default y if !GKI_HACKS_TO_FIX
help
Say y here to disable Android GKI support. Then
all the ABI compatibilities are not applicable.
If unsure, say Y.
config ROCKCHIP_DISABLE_UNUSED
tristate "Rockchip Disable Unused"
default m if GKI_HACKS_TO_FIX
help
Disable unused clk and power down after module init.
If unsure, say "N".
#
# Rockchip Soc drivers
#
config ROCKCHIP_AMP
tristate "Rockchip AMP support"
help
Say y here to enable Rockchip AMP support.
This option protects resources used by AMP.
config ROCKCHIP_ARM64_ALIGN_FAULT_FIX
bool "Rockchip align fault fix support"
depends on ARM64 && NO_GKI
help
Say y here to enable Rockchip align fault fix support.
config ROCKCHIP_CPUINFO
tristate "Rockchip cpuinfo support"
depends on (NVMEM_ROCKCHIP_EFUSE || NVMEM_ROCKCHIP_OTP) && (ARM64 || ARM)
help
Say y here to enable Rockchip cpuinfo support.
Set system_serial_low/high from eFuse ID.
Serial can read from /proc/cpuinfo.
If unsure, say N.
config ROCKCHIP_CSU
tristate "Rockchip Clock Subunit Driver"
depends on ARCH_ROCKCHIP
help
This adds the clock subunit driver for Rockchip SoCs.
config ROCKCHIP_GRF
tristate "Rockchip General Register Files support"
help
The General Register Files are a central component providing
special additional settings registers for a lot of soc-components.
In a lot of cases there also need to be default settings initialized
to make some of them conform to expectations of the kernel.
config ROCKCHIP_HW_DECOMPRESS
bool "Rockchip HardWare Decompress Support"
help
This driver support Decompress IP built-in Rockchip SoC, support
LZ4, GZIP, ZLIB.
config ROCKCHIP_HW_DECOMPRESS_TEST
bool "Rockchip Hw-Decompress test"
depends on ROCKCHIP_HW_DECOMPRESS
help
Say yes here to enable decompress test
config ROCKCHIP_HW_DECOMPRESS_USER
tristate "Rockchip HardWare Decompress User Interface Support"
default n
select ROCKCHIP_HW_DECOMPRESS
help
This driver support user invokes the Decompress IP built-in Rockchip SoC, support
LZ4, GZIP, ZLIB.
config ROCKCHIP_IODOMAIN
tristate "Rockchip IO domain support"
depends on OF
help
Say y here to enable support io domains on Rockchip SoCs. It is
necessary for the io domain setting of the SoC to match the
voltage supplied by the regulators.
config ROCKCHIP_IOMUX
tristate "Rockchip IOMUX ioctl support"
depends on PINCTRL_ROCKCHIP
help
This is the debug option for rockchip pinctrl driver by add a device
/dev/iomux to set or get iomux.
If unsure, say N.
config ROCKCHIP_IPA
tristate "Rockchip IPA support"
depends on THERMAL && OF
help
Say y here to enable rockchip IPA.
Add a simple power model for ipa to calculate static power and
dynamic power.
If unsure, say N.
config ROCKCHIP_OPP
tristate "Rockchip OPP select support"
depends on PM_DEVFREQ
help
Say y here to enable rockchip OPP support.
config ROCKCHIP_OPTIMIZE_RT_PRIO
bool "Rockchip optimize prio for kernel RT thread and kworker"
depends on NO_GKI
help
In some cases, there are too much userspace high priority RT threads, which
cause kernel RT threads or kworkers block too long time. This config separate
kernel and userspace RT threads into two priority regions, priority 0~49 for
kernel and priority 50~99 for userspace, so that kernel RT threads is always
higher priority than userspace. This config also set RT policy for kworkers.
config ROCKCHIP_PERFORMANCE
bool "Rockchip performance configuration support"
depends on NO_GKI
help
This config aims to support different requests between power consumption
and performance.
config ROCKCHIP_PERFORMANCE_LEVEL
int "Rockchip performance default level"
depends on ROCKCHIP_PERFORMANCE
range 0 2
default 1
help
Select default performance level:
0 for low-performance (powersave),
1 for normal performance,
2 for high-performance.
This can also be changed at runtime (via the level module parameter).
config ROCKCHIP_PM_DOMAINS
tristate "Rockchip generic power domain"
depends on PM
select PM_GENERIC_DOMAINS
help
Say y here to enable power domain support.
In order to meet high performance and low power requirements, a power
management unit is designed or saving power when RK3288 in low power
mode. The RK3288 PMU is dedicated for managing the power of the whole chip.
If unsure, say N.
config ROCKCHIP_DTPM
tristate "Rockchip DTPM hierarchy"
depends on DTPM && m
help
Describe the hierarchy for the Dynamic Thermal Power Management tree
on this platform. That will create all the power capping capable
devices.
config ROCKCHIP_PVTM
tristate "Rockchip PVTM support"
help
Say y here to enable pvtm support.
The Process-Voltage-Temperature Monitor (PVTM) is used to monitor
the chip performance variance caused by chip process, voltage and
temperature.
config ROCKCHIP_RAMDISK
bool "Rockchip RAM disk support"
help
Saying Y here will allow you to use reserved RAM memory as a block
device.
config ROCKCHIP_LITE_ULTRA_SUSPEND
bool "Enable lite/ultra suspend"
depends on SUSPEND && NO_GKI
help
Add mem_sleep_states options lite/ultra for RK ebook project
config ROCKCHIP_SUSPEND_MODE
tristate "Rockchip suspend mode config"
depends on SUSPEND
help
Say Y here if you want to set the suspend mode to the ATF.
config ROCKCHIP_SUSPEND_DEBUG
bool "Rockchip suspend debug"
depends on ROCKCHIP_SUSPEND_MODE
help
Say y here to enable rockchip suspend debug support.
config ROCKCHIP_SYSTEM_MONITOR
tristate "Rockchip system monitor support"
help
Say y here to enable rockchip system monitor support.
config HAS_EARLYSUSPEND
bool
config ROCKCHIP_EARLYSUSPEND
bool "Rockchip early suspend"
select HAS_EARLYSUSPEND
depends on !EARLYSUSPEND
depends on !FB_NOTIFY
depends on ROCKCHIP_SYSTEM_MONITOR
help
Call early suspend handlers when the user requested sleep state
changes.
config ROCKCHIP_VENDOR_STORAGE
tristate "Rockchip vendor storage support"
help
Say y here to enable rockchip vendor storage support.
config ROCKCHIP_MMC_VENDOR_STORAGE
tristate "Rockchip mmc vendor storage support"
depends on ROCKCHIP_VENDOR_STORAGE && MMC
help
Say y here to enable rockchip mmc vendor storage support.
config ROCKCHIP_FLASH_VENDOR_STORAGE
tristate "Rockchip flash vendor storage support"
depends on ROCKCHIP_VENDOR_STORAGE && RK_FLASH
help
Say y here to enable rockchip flash vendor storage support.
config ROCKCHIP_MTD_VENDOR_STORAGE
tristate "Rockchip mtd vendor storage support"
depends on ROCKCHIP_VENDOR_STORAGE && MTD
help
Say y here to enable rockchip mtd vendor storage support.
config ROCKCHIP_RAM_VENDOR_STORAGE
tristate "Rockchip ram vendor storage support"
depends on ROCKCHIP_VENDOR_STORAGE
help
Say y here to enable rockchip ram vendor storage support.
config ROCKCHIP_VENDOR_STORAGE_UPDATE_LOADER
bool "Rockchip vendor storage update loader support"
default n
help
Say y here to enable rockchip vendor storage update loader support.
The /dev/vendor_storage must set root user access only.
menu "FIQ Debugger"
source "drivers/soc/rockchip/fiq_debugger/Kconfig"
endmenu
config ROCKCHIP_DEBUG
tristate "Rockchip DEBUG"
help
Print dbgpcsr for every cpu when panic.
config ROCKCHIP_MINI_KERNEL
bool "Rockchip Mini Kernel support"
select NO_GKI
default y if CPU_RV1103B || CPU_RV1106 || CPU_RV1126
help
Say y here to enable Rockchip mini kernel support.
This option make the kernel size smaller.
if ROCKCHIP_MINI_KERNEL
config ROCKCHIP_KMALLOC_NO_USE_ARCH_DMA_MINALIGN
bool "Rockchip kmalloc no use ARCH_DMA_MINALIGN"
default y if CPU_RV1103B || CPU_RV1106 || CPU_RV1126
help
Say y here to make ARCH_KMALLOC_MINALIGN != ARCH_DMA_MINALIGN
This option can save kmalloc memory but break drivers which
assume kmalloc returned memory is aligned for DMA.
If unsure, say N.
endif
config ROCKCHIP_THUNDER_BOOT
bool "Rockchip Thunder Boot support"
depends on NO_GKI
select ROCKCHIP_THUNDER_BOOT_DEFER_FREE_MEMBLOCK if SMP
help
Say y here to enable Rockchip thunder boot support.
This option make the kernel boot faster.
config ROCKCHIP_THUNDER_BOOT_DEFER_FREE_MEMBLOCK
bool "Defer free large memblock to Buddy allocator"
depends on SMP
depends on NO_GKI
help
The physical memory of a system is divided into several types, like
memory reserved for device, for kernel pagetable, etc. The remaining
area is for Buddy allocator. Normally, The memory for Buddy is consist
of different size blocks, so, under meeting the memory request of kernel
booting, we can defer free the large block size to Buddy which can be
done later in work queue in parallel to other kernel threads, and the
size of the large block can be defined in kernel command line
by "defer_free_block_size" boot parameter.
config ROCKCHIP_THUNDER_BOOT_MMC
bool "Rockchip Thunder Boot from MMC"
depends on ROCKCHIP_THUNDER_BOOT
help
Say y if boot from MMC.
config ROCKCHIP_THUNDER_BOOT_SFC
bool "Rockchip Thunder Boot from SFC"
depends on ROCKCHIP_THUNDER_BOOT
help
Say y if boot from SPI Flash from SFC controller.
config ROCKCHIP_THUNDER_BOOT_SERVICE
bool "Rockchip Thunder Boot Service"
depends on ROCKCHIP_THUNDER_BOOT
depends on MAILBOX
help
Say y if MCU need to notify AP.
config ROCKCHIP_NPOR_POWERGOOD
bool "Rockchip NPOR Powergood"
help
Say y if SOC integrate ROCKCHIP NPOR Powergood.
#
# Rockchip Procfs drivers
#
config RK_CMA_PROCFS
tristate "CMA procfs interface"
depends on CMA && PROC_FS
help
Turns on the ProcFS interface for CMA, shows the bitmap in hex
format.
config RK_DMABUF_PROCFS
tristate "DMABUF procfs support"
depends on DMA_SHARED_BUFFER
depends on PROC_FS
help
Turns on this to create a procfs debug interface for dma-buf, support
get information from db_list by dma_buf_get_each.
If unsure, say "N".
config RK_MEMBLOCK_PROCFS
bool "Memblock procfs for reserved memory"
depends on PROC_FS && ARCH_KEEP_MEMBLOCK
help
Extend memblock procfs to show size of each memblock, and shows the
result of total size by KiB format.
config RK_ZONEINFO_PROCFS
bool "Zoneinfo procfs support"
depends on PROC_FS
help
Dump all zone information.
source "drivers/soc/rockchip/minidump/Kconfig"
endmenu
endif

85
package/kernel/rockchip-drivers/src/drivers/soc/rockchip/Kconfig.cpu Normal file
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# SPDX-License-Identifier: GPL-2.0
menu "Rockchip CPU selection"
depends on ARCH_ROCKCHIP
config CPU_RK312X
bool "RK3126/8"
depends on ARM
config CPU_RK3036
bool "RK3036"
depends on ARM
config CPU_RK30XX
bool "RK3066/8"
depends on ARM
config CPU_RK3188
bool "RK3188"
depends on ARM
config CPU_RK3288
bool "RK3288"
depends on ARM
config CPU_RK322X
bool "RK3228/9"
depends on ARM
config CPU_RV1103B
bool "RV1103B"
depends on ARM
config CPU_RV1106
bool "RV1103/6"
depends on ARM
config CPU_RV1108
bool "RV1107/8"
depends on ARM
config CPU_RV1126
bool "RV1109/26"
depends on ARM
config CPU_RV1126B
bool "RV1126B"
config CPU_PX30
bool "PX30"
config CPU_RK1808
bool "RK1808"
config CPU_RK3308
bool "RK3308"
config CPU_RK3328
bool "RK3328"
config CPU_RK3368
bool "RK3368"
config CPU_RK3399
bool "RK3399"
config CPU_RK3506
bool "RK3506"
config CPU_RK3528
bool "RK3528"
config CPU_RK3562
bool "RK3562"
config CPU_RK3568
bool "RK3566/8"
config CPU_RK3576
bool "RK3576"
config CPU_RK3588
bool "RK3588"
endmenu

39
package/kernel/rockchip-drivers/src/drivers/soc/rockchip/Makefile Normal file
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# SPDX-License-Identifier: GPL-2.0-only
#
# Rockchip Soc drivers
#
obj-$(CONFIG_ROCKCHIP_AMP) += rockchip_amp.o
obj-$(CONFIG_ROCKCHIP_CPUINFO) += rockchip-cpuinfo.o
obj-$(CONFIG_ROCKCHIP_CSU) += rockchip_csu.o
obj-$(CONFIG_ROCKCHIP_DISABLE_UNUSED) += rockchip_disable_unused.o
obj-$(CONFIG_ROCKCHIP_GRF) += grf.o
obj-$(CONFIG_ROCKCHIP_HW_DECOMPRESS) += rockchip_decompress.o
obj-$(CONFIG_ROCKCHIP_HW_DECOMPRESS_USER) += rockchip_decompress_user.o
obj-$(CONFIG_ROCKCHIP_IODOMAIN) += io-domain.o
obj-$(CONFIG_ROCKCHIP_IOMUX) += iomux.o
obj-$(CONFIG_ROCKCHIP_PM_DOMAINS) += pm_domains.o
obj-$(CONFIG_ROCKCHIP_DTPM) += dtpm.o
obj-$(CONFIG_ROCKCHIP_FIQ_DEBUGGER) += fiq_debugger/
obj-$(CONFIG_ROCKCHIP_VENDOR_STORAGE) += rk_vendor_storage.o
obj-$(CONFIG_ROCKCHIP_MMC_VENDOR_STORAGE) += sdmmc_vendor_storage.o
obj-$(CONFIG_ROCKCHIP_FLASH_VENDOR_STORAGE) += flash_vendor_storage.o
obj-$(CONFIG_ROCKCHIP_MTD_VENDOR_STORAGE) += mtd_vendor_storage.o
obj-$(CONFIG_ROCKCHIP_RAM_VENDOR_STORAGE) += ram_vendor_storage.o
obj-$(CONFIG_ROCKCHIP_IPA) += rockchip_ipa.o
obj-$(CONFIG_ROCKCHIP_OPP) += rockchip_opp_select.o
obj-$(CONFIG_ROCKCHIP_PERFORMANCE) += rockchip_performance.o
obj-$(CONFIG_ROCKCHIP_PVTM) += rockchip_pvtm.o
obj-$(CONFIG_ROCKCHIP_RAMDISK) += rockchip_ramdisk.o
obj-$(CONFIG_ROCKCHIP_SUSPEND_DEBUG) += rockchip_pm_debug.o
obj-$(CONFIG_ROCKCHIP_SUSPEND_MODE) += rockchip_pm_config.o
obj-$(CONFIG_ROCKCHIP_SYSTEM_MONITOR) += rockchip_system_monitor.o
obj-$(CONFIG_ROCKCHIP_THUNDER_BOOT_MMC) += rockchip_thunderboot_mmc.o
obj-$(CONFIG_ROCKCHIP_THUNDER_BOOT_SFC) += rockchip_thunderboot_sfc.o
obj-$(CONFIG_ROCKCHIP_THUNDER_BOOT_SERVICE) += rockchip_thunderboot_service.o
obj-$(CONFIG_ROCKCHIP_DEBUG) += rockchip_debug.o
obj-$(CONFIG_ROCKCHIP_NPOR_POWERGOOD) += rockchip_npor_powergood.o
obj-$(CONFIG_RK_CMA_PROCFS) += rk_cma_procfs.o
obj-$(CONFIG_RK_DMABUF_PROCFS) += rk_dmabuf_procfs.o
obj-$(CONFIG_RK_MEMBLOCK_PROCFS) += rk_memblock_procfs.o
obj-$(CONFIG_RK_ZONEINFO_PROCFS) += rk_zoneinfo_procfs.o
obj-$(CONFIG_ROCKCHIP_MINIDUMP) += minidump/

234
package/kernel/rockchip-drivers/src/drivers/soc/rockchip/rockchip_ipa.c Normal file
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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
*/
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/thermal.h>
#include <soc/rockchip/rockchip_ipa.h>
#include <soc/rockchip/rockchip_opp_select.h>
#define CREATE_TRACE_POINTS
#include <trace/events/thermal_ipa_power.h>
#define FALLBACK_STATIC_TEMPERATURE 55000
static void calculate_static_coefficient(struct ipa_power_model_data *data)
{
s32 *ls = data->ls;
u32 lkg = data->leakage;
u32 ref_lkg = data->ref_leakage;
u32 min = data->lkg_range[0], max = data->lkg_range[1];
u32 static_coeff = data->static_coefficient;
u32 lkg_scaling_factor;
if (!lkg) {
if (ref_lkg)
lkg = ref_lkg;
else
lkg = (min + max) / 2;
}
if (ref_lkg) {
data->static_coefficient = static_coeff * lkg / ref_lkg;
return;
}
if (lkg < min)
lkg = min;
if (lkg > max)
lkg = max;
/* As ts have beed multiplied by 1000 in devicetree */
lkg_scaling_factor = (ls[2] * lkg * lkg + ls[1] * lkg + ls[0]) / 1000;
data->static_coefficient = static_coeff * lkg_scaling_factor / 100;
}
/**
* rockchip_ipa_power_model_init() - initialise ipa power model parameter
* @dev: device for which we do this operation
* @lkg_name: nvmem cell name from nvmem-cell-names property
*
* Return: a valid struct ipa_power_model_data pointer on success, and the onwer
* should use kfree to release the memory by itself. on failure, it returns a
* corresponding ERR_PTR().
*/
struct ipa_power_model_data *rockchip_ipa_power_model_init(struct device *dev,
char *lkg_name)
{
struct device_node *model_node;
struct ipa_power_model_data *model_data;
const char *tz_name;
int ret;
model_data = kzalloc(sizeof(*model_data), GFP_KERNEL);
if (!model_data)
return ERR_PTR(-ENOMEM);
model_node = of_get_compatible_child(dev->of_node,
"simple-power-model");
if (!model_node) {
dev_err(dev, "failed to find power_model node\n");
ret = -ENODEV;
goto err;
}
if (of_property_read_string(model_node, "thermal-zone", &tz_name)) {
dev_err(dev, "ts in power_model not available\n");
ret = -EINVAL;
goto err;
}
model_data->tz = thermal_zone_get_zone_by_name(tz_name);
if (IS_ERR_OR_NULL(model_data->tz)) {
dev_err(dev, "failed to get thermal zone\n");
model_data->tz = NULL;
ret = -EPROBE_DEFER;
goto err;
}
if (of_property_read_u32(model_node, "static-coefficient",
&model_data->static_coefficient)) {
dev_err(dev, "static-coefficient not available\n");
ret = -EINVAL;
goto err;
}
/* cpu power model node doesn't contain dynamic-coefficient */
of_property_read_u32(model_node, "dynamic-coefficient",
&model_data->dynamic_coefficient);
if (of_property_read_u32_array
(model_node, "ts", (u32 *)model_data->ts, 4)) {
dev_err(dev, "ts in power_model not available\n");
ret = -EINVAL;
goto err;
}
rockchip_of_get_leakage(dev, lkg_name, &model_data->leakage);
if (!of_property_read_u32(model_node, "ref-leakage",
&model_data->ref_leakage))
goto cal_static_coeff;
if (of_property_read_u32_array(model_node, "leakage-range",
(u32 *)model_data->lkg_range, 2)) {
dev_err(dev, "leakage-range isn't available\n");
ret = -EINVAL;
goto err;
}
if (of_property_read_u32_array(model_node, "ls",
(u32 *)model_data->ls, 3)) {
dev_err(dev, "ls isn't available\n");
ret = -EINVAL;
goto err;
}
cal_static_coeff:
calculate_static_coefficient(model_data);
of_node_put(model_node);
return model_data;
err:
of_node_put(model_node);
kfree(model_data);
return ERR_PTR(ret);
}
EXPORT_SYMBOL(rockchip_ipa_power_model_init);
/**
* calculate_temp_scaling_factor() - Calculate temperature scaling coefficient
* @ts: Signed coefficients, in order t^0 to t^3, with units Deg^-N
* @t: Temperature, in mDeg C. Range: -40000 < t < 125000
*
* Scale the temperature according to a cubic polynomial whose coefficients are
* provided in the device tree. The result is used to scale the static power
* coefficient, where 1000000 means no change.
*
* Return: Temperature scaling factor.
*/
static u32 calculate_temp_scaling_factor(s32 ts[4], s64 t)
{
const s64 t2 = div_s64((t * t), 1000);
const s64 t3 = div_s64((t * t2), 1000);
/*
* Sum the parts. t^[1-3] are in m(Deg^N), but the coefficients are in
* Deg^-N, so we need to multiply the last coefficient by 1000.
*/
const s64 res_big = ts[3] * t3
+ ts[2] * t2
+ ts[1] * t
+ ts[0] * 1000LL;
/* ts has beed multiplied by 10 in devicetree */
s64 res_unclamped = div_s64(res_big, 10000);
/* Clamp to range of 0x to 10x the static power */
return clamp(res_unclamped, (s64)0, (s64)10000000);
}
/**
* calculate_volt_scaling_factor() - Calculate voltage scaling coefficient
* voltage_mv: Voltage, in mV. Range: 750 < voltage < 1350
*
* Return: Voltage scaling factor.
*/
static u32 calculate_volt_scaling_factor(const u32 voltage_mv)
{
const u32 v2 = (voltage_mv * voltage_mv) / 1000;
const u32 v3_big = v2 * voltage_mv;
const u32 v3 = v3_big / 1000;
const u32 v4_big = v3 * voltage_mv;
const u32 v4 = v4_big / 1000;
return v4;
}
/**
* rockchip_ipa_get_static_power() - Calculate static power
* @data: Pointer to IPA model
* voltage_mv: Voltage, in mV. Range: 750 < voltage < 1350
*
* Return: Static power.
*/
unsigned long
rockchip_ipa_get_static_power(struct ipa_power_model_data *data,
unsigned long voltage_mv)
{
u32 temp_scaling_factor, volt_scaling_factor, static_power;
u64 power_big;
int temp;
int ret;
if (!data)
return 0;
ret = thermal_zone_get_temp(data->tz, &temp);
if (ret) {
pr_err("%s:failed to read %s temp\n",
__func__, thermal_zone_device_type(data->tz));
temp = FALLBACK_STATIC_TEMPERATURE;
}
temp_scaling_factor = calculate_temp_scaling_factor(data->ts, temp);
volt_scaling_factor = calculate_volt_scaling_factor((u32)voltage_mv);
power_big = (u64)data->static_coefficient * (u64)temp_scaling_factor;
static_power = div_u64(power_big, 1000000);
power_big = (u64)static_power * (u64)volt_scaling_factor;
static_power = div_u64(power_big, 1000000);
trace_thermal_ipa_get_static_power(data->leakage,
data->static_coefficient,
temp,
temp_scaling_factor,
(u32)voltage_mv,
volt_scaling_factor,
static_power);
return static_power;
}
EXPORT_SYMBOL(rockchip_ipa_get_static_power);
MODULE_DESCRIPTION("Rockchip IPA driver");
MODULE_AUTHOR("Finley Xiao <finley.xiao@rock-chips.com>");
MODULE_LICENSE("GPL");

2619
package/kernel/rockchip-drivers/src/drivers/soc/rockchip/rockchip_opp_select.c Normal file
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1047
package/kernel/rockchip-drivers/src/drivers/soc/rockchip/rockchip_pvtm.c Normal file
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File diff suppressed because it is too large Load Diff

2031
package/kernel/rockchip-drivers/src/drivers/soc/rockchip/rockchip_system_monitor.c Normal file
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File diff suppressed because it is too large Load Diff

42
package/kernel/rockchip-drivers/src/include/linux/ebc.h Normal file
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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
*
* Author: Zorro Liu <zorro.liu@rock-chips.com>
*/
#ifndef __LINUX_EBC_H__
#define __LINUX_EBC_H__
#include <linux/notifier.h>
/*
* ebc status notify
*/
#define EBC_OFF (0)
#define EBC_ON (1)
#define EBC_FB_BLANK (2)
#define EBC_FB_UNBLANK (3)
#if IS_REACHABLE(CONFIG_ROCKCHIP_EBC_DEV)
int ebc_register_notifier(struct notifier_block *nb);
int ebc_unregister_notifier(struct notifier_block *nb);
int ebc_notify(unsigned long event);
#else
static inline int ebc_register_notifier(struct notifier_block *nb)
{
return 0;
}
static inline int ebc_unregister_notifier(struct notifier_block *nb)
{
return 0;
}
static inline int ebc_notify(unsigned long event)
{
return 0;
}
#endif
#endif

17
package/kernel/rockchip-drivers/src/include/linux/soc/rockchip/pvtm.h Normal file
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __SOC_ROCKCHIP_PVTM_H
#define __SOC_ROCKCHIP_PVTM_H
#if IS_ENABLED(CONFIG_ROCKCHIP_PVTM)
u32 rockchip_get_pvtm_value(unsigned int id, unsigned int ring_sel,
unsigned int time_us);
#else
static inline u32 rockchip_get_pvtm_value(unsigned int id,
unsigned int ring_sel,
unsigned int time_us)
{
return 0;
}
#endif
#endif /* __SOC_ROCKCHIP_PVTM_H */

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package/kernel/rockchip-drivers/src/include/soc/rockchip/rockchip-system-status.h Normal file
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/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
* Copyright (C) 2019, Fuzhou Rockchip Electronics Co., Ltd
*/
#ifndef __SOC_ROCKCHIP_SYSTEM_STATUS_H
#define __SOC_ROCKCHIP_SYSTEM_STATUS_H
#include <dt-bindings/soc/rockchip-system-status.h>
#if IS_REACHABLE(CONFIG_ROCKCHIP_SYSTEM_MONITOR)
int rockchip_register_system_status_notifier(struct notifier_block *nb);
int rockchip_unregister_system_status_notifier(struct notifier_block *nb);
void rockchip_set_system_status(unsigned long status);
void rockchip_clear_system_status(unsigned long status);
unsigned long rockchip_get_system_status(void);
int rockchip_add_system_status_interface(struct device *dev);
void rockchip_update_system_status(const char *buf);
#else
static inline int
rockchip_register_system_status_notifier(struct notifier_block *nb)
{
return -ENOTSUPP;
};
static inline int
rockchip_unregister_system_status_notifier(struct notifier_block *nb)
{
return -ENOTSUPP;
};
static inline void rockchip_set_system_status(unsigned long status)
{
};
static inline void rockchip_clear_system_status(unsigned long status)
{
};
static inline unsigned long rockchip_get_system_status(void)
{
return 0;
};
static inline int rockchip_add_system_status_interface(struct device *dev)
{
return -ENOTSUPP;
};
static inline void rockchip_update_system_status(const char *buf)
{
};
#endif /* CONFIG_ROCKCHIP_SYSTEM_MONITOR */
#endif

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package/kernel/rockchip-drivers/src/include/trace/events/thermal_ipa_power.h Normal file
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/* SPDX-License-Identifier: GPL-2.0 */
#undef TRACE_SYSTEM
#define TRACE_SYSTEM thermal_ipa_power
#if !defined(_TRACE_THERMAL_IPA_POWER_H) || defined(TRACE_HEADER_MULTI_READ)
#define _TRACE_THERMAL_IPA_POWER_H
#include <linux/tracepoint.h>
TRACE_EVENT(thermal_ipa_get_static_power,
TP_PROTO(u32 leakage, u32 coefficient, s32 temp,
u32 temp_scaling_factor, u32 volt, u32 volt_scaling_factor,
u32 static_power),
TP_ARGS(leakage, coefficient, temp, temp_scaling_factor, volt,
volt_scaling_factor, static_power),
TP_STRUCT__entry(
__field(u32, leakage)
__field(u32, coefficient)
__field(s32, temp)
__field(u32, temp_scaling_factor)
__field(u32, volt)
__field(u32, volt_scaling_factor)
__field(u32, static_power)
),
TP_fast_assign(
__entry->leakage = leakage;
__entry->coefficient = coefficient;
__entry->temp = temp;
__entry->temp_scaling_factor = temp_scaling_factor;
__entry->volt = volt;
__entry->volt_scaling_factor = volt_scaling_factor;
__entry->static_power = static_power;
),
TP_printk("lkg=%u c=%u t=%d ts=%u v=%u vs=%u static_power=%u",
__entry->leakage, __entry->coefficient, __entry->temp,
__entry->temp_scaling_factor, __entry->volt,
__entry->volt_scaling_factor, __entry->static_power)
);
#endif /* _TRACE_THERMAL_IPA_POWER_H */
/* This part must be outside protection */
#include <trace/define_trace.h>