airoha: Introduce support for Airoha AN7583 SoC
Introduce initial support for Airoha AN7583 SoC and add all the required patch for basic functionality of the SoC. Airoha AN7583 is based on Airoha EN7581 SoC with some major changes on the PHY handling and Serdes. It can be see as a lower spec of EN7581 with modern and simplified implementations. All the patch are sent upstream and are pending revision. Support for PCIe and USB will come later as soon as DT structure is accepted upstream. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Christian Marangi
parent
2470ee42ae
commit
c5b12fc02a
@ -3,7 +3,7 @@ include $(TOPDIR)/rules.mk
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ARCH:=arm
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BOARD:=airoha
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BOARDNAME:=Airoha ARM
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SUBTARGETS:=en7523 an7581
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SUBTARGETS:=en7523 an7581 an7583
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FEATURES:=dt squashfs nand ramdisk gpio
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KERNEL_PATCHVER:=6.12
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@ -213,6 +213,7 @@ CONFIG_LZO_COMPRESS=y
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CONFIG_LZO_DECOMPRESS=y
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CONFIG_MDIO_BUS=y
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CONFIG_MDIO_DEVICE=y
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# CONFIG_MDIO_AIROHA is not set
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CONFIG_MDIO_DEVRES=y
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# CONFIG_MEDIATEK_GE_SOC_PHY is not set
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# CONFIG_MEMCG is not set
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@ -289,6 +290,7 @@ CONFIG_PCI_DOMAINS=y
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CONFIG_PCI_DOMAINS_GENERIC=y
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CONFIG_PCI_MSI=y
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CONFIG_PCS_AIROHA_AN7581=y
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# CONFIG_PCS_AIROHA_AN7583 is not set
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CONFIG_PERF_EVENTS=y
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CONFIG_PER_VMA_LOCK=y
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CONFIG_PGTABLE_LEVELS=3
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28
target/linux/airoha/an7583/base-files/etc/board.d/02_network
Normal file
28
target/linux/airoha/an7583/base-files/etc/board.d/02_network
Normal file
@ -0,0 +1,28 @@
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#
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# Copyright (c) 2015 The Linux Foundation. All rights reserved.
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# Copyright (c) 2011-2015 OpenWrt.org
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#
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. /lib/functions/uci-defaults.sh
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. /lib/functions/system.sh
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an7583_setup_interfaces()
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{
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local board="$1"
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case "$board" in
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airoha,an7583-evb)
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ucidef_set_interface_lan "lan1 lan2 lan3 lan4 eth1"
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;;
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*)
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echo "Unsupported hardware. Network interfaces not initialized"
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;;
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esac
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}
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board_config_update
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board=$(board_name)
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an7583_setup_interfaces $board
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board_config_flush
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exit 0
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402
target/linux/airoha/an7583/config-6.12
Normal file
402
target/linux/airoha/an7583/config-6.12
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@ -0,0 +1,402 @@
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CONFIG_64BIT=y
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CONFIG_AIROHA_CPU_PM_DOMAIN=y
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CONFIG_AIROHA_SCU_SSR=y
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CONFIG_AIROHA_THERMAL=y
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CONFIG_AIROHA_WATCHDOG=y
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CONFIG_AMPERE_ERRATUM_AC03_CPU_38=y
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CONFIG_ARCH_AIROHA=y
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CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
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CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
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CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y
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CONFIG_ARCH_DMA_ADDR_T_64BIT=y
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CONFIG_ARCH_FORCE_MAX_ORDER=10
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CONFIG_ARCH_KEEP_MEMBLOCK=y
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CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
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CONFIG_ARCH_MMAP_RND_BITS=18
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CONFIG_ARCH_MMAP_RND_BITS_MAX=24
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CONFIG_ARCH_MMAP_RND_BITS_MIN=18
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CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
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CONFIG_ARCH_PROC_KCORE_TEXT=y
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CONFIG_ARCH_SPARSEMEM_ENABLE=y
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CONFIG_ARCH_STACKWALK=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_WANTS_NO_INSTR=y
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CONFIG_ARCH_WANTS_THP_SWAP=y
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CONFIG_ARM64=y
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CONFIG_ARM64_4K_PAGES=y
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CONFIG_ARM64_ERRATUM_843419=y
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CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
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CONFIG_ARM64_PA_BITS=48
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CONFIG_ARM64_PA_BITS_48=y
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CONFIG_ARM64_PLATFORM_DEVICES=y
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CONFIG_ARM64_TAGGED_ADDR_ABI=y
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CONFIG_ARM64_VA_BITS=39
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CONFIG_ARM64_VA_BITS_39=y
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# CONFIG_ARM64_VA_BITS_48 is not set
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# CONFIG_ARM64_VA_BITS_52 is not set
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CONFIG_ARM_AIROHA_SOC_CPUFREQ=y
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CONFIG_ARM_AMBA=y
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CONFIG_ARM_ARCH_TIMER=y
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CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
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# CONFIG_ARM_DEBUG_WX is not set
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CONFIG_ARM_GIC=y
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CONFIG_ARM_GIC_V2M=y
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CONFIG_ARM_GIC_V3=y
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CONFIG_ARM_GIC_V3_ITS=y
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CONFIG_ARM_PMU=y
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CONFIG_ARM_PMUV3=y
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CONFIG_ARM_PSCI_FW=y
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CONFIG_ARM_SMCCC_SOC_ID=y
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# CONFIG_ARM_SMMU is not set
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# CONFIG_ARM_SMMU_V3 is not set
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CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
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CONFIG_BLK_MQ_PCI=y
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CONFIG_BLK_PM=y
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CONFIG_BUFFER_HEAD=y
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CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y
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CONFIG_CC_HAVE_SHADOW_CALL_STACK=y
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CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
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CONFIG_CLONE_BACKWARDS=y
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CONFIG_COMMON_CLK=y
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CONFIG_COMMON_CLK_EN7523=y
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CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
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# CONFIG_COMPAT_32BIT_TIME is not set
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# CONFIG_COMPRESSED_INSTALL is not set
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CONFIG_CONTEXT_TRACKING=y
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CONFIG_CONTEXT_TRACKING_IDLE=y
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CONFIG_CPUFREQ_DT=y
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CONFIG_CPUFREQ_DT_PLATDEV=y
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CONFIG_CPU_FREQ=y
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CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
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# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
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CONFIG_CPU_FREQ_GOV_ATTR_SET=y
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CONFIG_CPU_FREQ_GOV_COMMON=y
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CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
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CONFIG_CPU_FREQ_GOV_ONDEMAND=y
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CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
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CONFIG_CPU_FREQ_GOV_POWERSAVE=y
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CONFIG_CPU_FREQ_GOV_USERSPACE=y
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CONFIG_CPU_FREQ_STAT=y
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CONFIG_CPU_LITTLE_ENDIAN=y
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CONFIG_CPU_RMAP=y
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CONFIG_CRC16=y
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CONFIG_CRC_CCITT=y
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CONFIG_CRYPTO_CRC32C=y
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CONFIG_CRYPTO_DEFLATE=y
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CONFIG_CRYPTO_DEV_EIP93=y
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CONFIG_CRYPTO_DRBG=y
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CONFIG_CRYPTO_DRBG_HMAC=y
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CONFIG_CRYPTO_DRBG_MENU=y
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CONFIG_CRYPTO_ECB=y
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CONFIG_CRYPTO_HASH_INFO=y
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CONFIG_CRYPTO_HMAC=y
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CONFIG_CRYPTO_JITTERENTROPY=y
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CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64
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CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32
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CONFIG_CRYPTO_JITTERENTROPY_OSR=1
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CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
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CONFIG_CRYPTO_LIB_GF128MUL=y
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CONFIG_CRYPTO_LIB_SHA1=y
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CONFIG_CRYPTO_LIB_SHA256=y
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CONFIG_CRYPTO_LIB_UTILS=y
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CONFIG_CRYPTO_LZO=y
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CONFIG_CRYPTO_RNG=y
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CONFIG_CRYPTO_RNG2=y
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CONFIG_CRYPTO_RNG_DEFAULT=y
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CONFIG_CRYPTO_SHA256=y
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CONFIG_CRYPTO_SHA3=y
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CONFIG_CRYPTO_SHA512=y
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CONFIG_CRYPTO_ZSTD=y
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CONFIG_DCACHE_WORD_ACCESS=y
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CONFIG_DEBUG_MISC=y
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CONFIG_DMADEVICES=y
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CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y
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CONFIG_DMA_DIRECT_REMAP=y
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CONFIG_DMA_ENGINE=y
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CONFIG_DMA_NEED_SYNC=y
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CONFIG_DMA_OF=y
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CONFIG_DMA_OPS_HELPERS=y
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CONFIG_DTC=y
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CONFIG_EDAC_SUPPORT=y
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CONFIG_EXT4_FS=y
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CONFIG_FIXED_PHY=y
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CONFIG_FIX_EARLYCON_MEM=y
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CONFIG_FRAME_POINTER=y
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CONFIG_FS_IOMAP=y
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CONFIG_FS_MBCACHE=y
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CONFIG_FUNCTION_ALIGNMENT=4
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CONFIG_FUNCTION_ALIGNMENT_4B=y
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CONFIG_FWNODE_MDIO=y
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CONFIG_FW_CACHE=y
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# CONFIG_FW_LOADER_USER_HELPER is not set
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CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y
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CONFIG_GENERIC_ALLOCATOR=y
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CONFIG_GENERIC_ARCH_TOPOLOGY=y
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CONFIG_GENERIC_BUG=y
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CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
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CONFIG_GENERIC_CPU_AUTOPROBE=y
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CONFIG_GENERIC_CPU_DEVICES=y
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CONFIG_GENERIC_CPU_VULNERABILITIES=y
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CONFIG_GENERIC_CSUM=y
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CONFIG_GENERIC_EARLY_IOREMAP=y
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CONFIG_GENERIC_GETTIMEOFDAY=y
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CONFIG_GENERIC_IDLE_POLL_SETUP=y
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CONFIG_GENERIC_IOREMAP=y
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CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
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CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
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CONFIG_GENERIC_MSI_IRQ=y
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CONFIG_GENERIC_PCI_IOMAP=y
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CONFIG_GENERIC_PHY=y
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CONFIG_GENERIC_PINCONF=y
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CONFIG_GENERIC_PINCTRL_GROUPS=y
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CONFIG_GENERIC_PINMUX_FUNCTIONS=y
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CONFIG_GENERIC_SCHED_CLOCK=y
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CONFIG_GENERIC_SMP_IDLE_THREAD=y
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CONFIG_GENERIC_STRNCPY_FROM_USER=y
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CONFIG_GENERIC_STRNLEN_USER=y
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CONFIG_GENERIC_TIME_VSYSCALL=y
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CONFIG_GLOB=y
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CONFIG_GPIOLIB_IRQCHIP=y
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CONFIG_GPIO_CDEV=y
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CONFIG_GPIO_EN7523=y
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CONFIG_GPIO_GENERIC=y
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CONFIG_GRO_CELLS=y
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CONFIG_HARDIRQS_SW_RESEND=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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CONFIG_HAS_IOPORT_MAP=y
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CONFIG_HOTPLUG_CORE_SYNC=y
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CONFIG_HOTPLUG_CORE_SYNC_DEAD=y
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CONFIG_HOTPLUG_CPU=y
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CONFIG_HW_RANDOM=y
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CONFIG_HW_RANDOM_AIROHA=y
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# CONFIG_HISILICON_ERRATUM_162100801 is not set
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# CONFIG_IDPF is not set
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CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
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CONFIG_INET_AH=y
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CONFIG_INET_ESP=y
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# CONFIG_INET_ESP_OFFLOAD is not set
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CONFIG_INET_IPCOMP=y
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CONFIG_INET_TUNNEL=y
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CONFIG_INET_XFRM_TUNNEL=y
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CONFIG_IO_URING=y
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CONFIG_IPC_NS=y
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CONFIG_IPV6=y
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CONFIG_IPV6_MULTIPLE_TABLES=y
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# CONFIG_IPV6_SUBTREES is not set
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CONFIG_IP_MROUTE=y
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CONFIG_IP_MROUTE_COMMON=y
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# CONFIG_IP_MROUTE_MULTIPLE_TABLES is not set
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CONFIG_IP_PNP=y
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# CONFIG_IP_PNP_BOOTP is not set
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# CONFIG_IP_PNP_DHCP is not set
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# CONFIG_IP_PNP_RARP is not set
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# CONFIG_IP_ROUTE_MULTIPATH is not set
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# CONFIG_IP_ROUTE_VERBOSE is not set
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CONFIG_IRQCHIP=y
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CONFIG_IRQ_DOMAIN=y
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CONFIG_IRQ_DOMAIN_HIERARCHY=y
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CONFIG_IRQ_FORCED_THREADING=y
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CONFIG_IRQ_MSI_LIB=y
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CONFIG_IRQ_WORK=y
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CONFIG_JBD2=y
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CONFIG_LIBFDT=y
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CONFIG_LOCK_DEBUGGING_SUPPORT=y
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CONFIG_LOCK_SPIN_ON_OWNER=y
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CONFIG_LRU_GEN_WALKS_MMU=y
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CONFIG_LZO_COMPRESS=y
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CONFIG_LZO_DECOMPRESS=y
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CONFIG_MDIO_BUS=y
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CONFIG_MDIO_DEVICE=y
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CONFIG_MDIO_AIROHA=y
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CONFIG_MDIO_DEVRES=y
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# CONFIG_MEDIATEK_GE_SOC_PHY is not set
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# CONFIG_MEMCG is not set
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CONFIG_MFD_SYSCON=y
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CONFIG_MIGRATION=y
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CONFIG_MMC=y
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CONFIG_MMC_BLOCK=y
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CONFIG_MMC_CQHCI=y
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CONFIG_MMC_MTK=y
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CONFIG_MMU_LAZY_TLB_REFCOUNT=y
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CONFIG_MODULES_TREE_LOOKUP=y
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CONFIG_MODULES_USE_ELF_RELA=y
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CONFIG_MTD_NAND_CORE=y
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CONFIG_MTD_NAND_ECC=y
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CONFIG_MTD_NAND_MTK_BMT=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_MTD_SPI_NAND=y
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CONFIG_MTD_SPLIT_FIRMWARE=y
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CONFIG_MTD_SPLIT_FIT_FW=y
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CONFIG_MTD_UBI=y
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CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI_BLOCK=y
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MUTEX_SPIN_ON_OWNER=y
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CONFIG_NEED_DMA_MAP_STATE=y
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CONFIG_NEED_SG_DMA_LENGTH=y
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CONFIG_NET_AIROHA=y
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CONFIG_NET_AIROHA_FLOW_STATS=y
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CONFIG_NET_DEVLINK=y
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CONFIG_NET_DSA=y
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CONFIG_NET_DSA_MT7530=y
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CONFIG_NET_DSA_MT7530_MDIO=y
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CONFIG_NET_DSA_MT7530_MMIO=y
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CONFIG_NET_DSA_TAG_MTK=y
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CONFIG_NET_FLOW_LIMIT=y
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# CONFIG_NET_MEDIATEK_SOC is not set
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CONFIG_NET_SELFTESTS=y
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# CONFIG_NET_VENDOR_3COM is not set
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CONFIG_NET_VENDOR_AIROHA=y
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# CONFIG_NET_VENDOR_MEDIATEK is not set
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CONFIG_NLS=y
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CONFIG_NO_HZ_COMMON=y
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CONFIG_NO_HZ_IDLE=y
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CONFIG_NR_CPUS=4
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CONFIG_NVMEM=y
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CONFIG_NVMEM_BLOCK=y
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CONFIG_NVMEM_LAYOUTS=y
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CONFIG_NVMEM_LAYOUT_ASCII_ENV=y
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CONFIG_NVMEM_SYSFS=y
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CONFIG_OF=y
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CONFIG_OF_ADDRESS=y
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CONFIG_OF_EARLY_FLATTREE=y
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CONFIG_OF_FLATTREE=y
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CONFIG_OF_GPIO=y
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CONFIG_OF_IRQ=y
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CONFIG_OF_KOBJ=y
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CONFIG_OF_MDIO=y
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CONFIG_PAGE_POOL=y
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CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
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CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
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CONFIG_PARTITION_PERCPU=y
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CONFIG_PCI=y
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CONFIG_PCIEAER=y
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CONFIG_PCIEASPM=y
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# CONFIG_PCIEASPM_DEFAULT is not set
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CONFIG_PCIEASPM_PERFORMANCE=y
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# CONFIG_PCIEASPM_POWERSAVE is not set
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# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
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CONFIG_PCIEPORTBUS=y
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CONFIG_PCIE_MEDIATEK=y
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CONFIG_PCIE_MEDIATEK_GEN3=y
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CONFIG_PCIE_PME=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PCI_DOMAINS_GENERIC=y
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CONFIG_PCI_MSI=y
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# CONFIG_PCS_AIROHA_AN7581 is not set
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CONFIG_PCS_AIROHA_AN7583=y
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CONFIG_PERF_EVENTS=y
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CONFIG_PER_VMA_LOCK=y
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CONFIG_PGTABLE_LEVELS=3
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CONFIG_PHYLIB=y
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CONFIG_PHYLIB_LEDS=y
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CONFIG_PHYLINK=y
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CONFIG_PHYS_ADDR_T_64BIT=y
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CONFIG_PHY_AIROHA_PCIE=y
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# CONFIG_PHY_AIROHA_USB is not set
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_AIROHA=y
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# CONFIG_PINCTRL_MT2712 is not set
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# CONFIG_PINCTRL_MT6765 is not set
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# CONFIG_PINCTRL_MT6795 is not set
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# CONFIG_PINCTRL_MT6797 is not set
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# CONFIG_PINCTRL_MT7622 is not set
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# CONFIG_PINCTRL_MT7981 is not set
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# CONFIG_PINCTRL_MT7986 is not set
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# CONFIG_PINCTRL_MT8173 is not set
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# CONFIG_PINCTRL_MT8183 is not set
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# CONFIG_PINCTRL_MT8186 is not set
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# CONFIG_PINCTRL_MT8188 is not set
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# CONFIG_PINCTRL_MT8516 is not set
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CONFIG_PM=y
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CONFIG_PM_CLK=y
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CONFIG_PM_OPP=y
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CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y
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CONFIG_POWER_RESET=y
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CONFIG_POWER_RESET_SYSCON=y
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CONFIG_POWER_SUPPLY=y
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CONFIG_PTP_1588_CLOCK_OPTIONAL=y
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CONFIG_QUEUED_RWLOCKS=y
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CONFIG_QUEUED_SPINLOCKS=y
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CONFIG_RANDSTRUCT_NONE=y
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CONFIG_RAS=y
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CONFIG_RATIONAL=y
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CONFIG_REGMAP=y
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CONFIG_REGMAP_MMIO=y
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CONFIG_REGULATOR=y
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CONFIG_REGULATOR_FIXED_VOLTAGE=y
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CONFIG_RELOCATABLE=y
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CONFIG_RESET_CONTROLLER=y
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CONFIG_RFS_ACCEL=y
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CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
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CONFIG_RPS=y
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CONFIG_RTL8261N_PHY=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
CONFIG_SERIAL_8250_AIROHA=y
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=5
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=5
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_MCTRL_GPIO=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SGL_ALLOC=y
|
||||
CONFIG_SKB_EXTENSIONS=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SOCK_RX_QUEUE_MAPPING=y
|
||||
CONFIG_SOC_BUS=y
|
||||
CONFIG_SOFTIRQ_ON_OWN_STACK=y
|
||||
CONFIG_SPARSEMEM=y
|
||||
CONFIG_SPARSEMEM_EXTREME=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
# CONFIG_SPI_AIROHA_EN7523 is not set
|
||||
CONFIG_SPI_AIROHA_SNFI=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MEM=y
|
||||
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
|
||||
CONFIG_SWIOTLB=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
# CONFIG_TEST_FPU is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_THREAD_INFO_IN_TASK=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_UNMAP_KERNEL_AT_EL0 is not set
|
||||
CONFIG_USER_STACKTRACE_SUPPORT=y
|
||||
CONFIG_VDSO_GETRANDOM=y
|
||||
CONFIG_VMAP_STACK=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
|
||||
CONFIG_XFRM_AH=y
|
||||
CONFIG_XFRM_ALGO=y
|
||||
CONFIG_XFRM_ESP=y
|
||||
CONFIG_XFRM_IPCOMP=y
|
||||
CONFIG_XFRM_MIGRATE=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XXHASH=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZONE_DMA32=y
|
||||
CONFIG_ZSTD_COMMON=y
|
||||
CONFIG_ZSTD_COMPRESS=y
|
||||
CONFIG_ZSTD_DECOMPRESS=y
|
||||
11
target/linux/airoha/an7583/target.mk
Normal file
11
target/linux/airoha/an7583/target.mk
Normal file
@ -0,0 +1,11 @@
|
||||
ARCH:=aarch64
|
||||
SUBTARGET:=an7583
|
||||
BOARDNAME:=AN7583
|
||||
CPU_TYPE:=cortex-a53
|
||||
KERNELNAME:=Image dtbs
|
||||
FEATURES+=pwm source-only
|
||||
|
||||
define Target/Description
|
||||
Build firmware images for Airoha an7583 ARM based boards.
|
||||
endef
|
||||
|
||||
215
target/linux/airoha/dts/an7583-evb.dts
Normal file
215
target/linux/airoha/dts/an7583-evb.dts
Normal file
@ -0,0 +1,215 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "an7583.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Airoha AN7583 Evaluation Board";
|
||||
compatible = "airoha,an7583-evb", "airoha,an7583", "airoha,en7583";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlycon";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x80000000 0x2 0x00000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&an7583_pinctrl {
|
||||
gpio-ranges = <&an7583_pinctrl 0 2 53>;
|
||||
|
||||
mdio0_pins: mdio0-pins {
|
||||
conf {
|
||||
pins = "mdio_0";
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_rst_pins: pcie0-rst-pins {
|
||||
conf {
|
||||
pins = "pcie_reset0";
|
||||
drive-open-drain = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie1_rst_pins: pcie1-rst-pins {
|
||||
conf {
|
||||
pins = "pcie_reset1";
|
||||
drive-open-drain = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
gswp1_led0_pins: gswp1-led0-pins {
|
||||
mux {
|
||||
function = "phy1_led0";
|
||||
pins = "gpio1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&snfi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
&spi_nand {
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
bl2@0 {
|
||||
label = "bl2";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
ubi@20000 {
|
||||
label = "ubi";
|
||||
reg = <0x20000 0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gdm1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&switch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gsw_phy1 {
|
||||
pinctrl-names = "gbe-led";
|
||||
pinctrl-0 = <&gswp1_led0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gsw_phy1_led0 {
|
||||
status = "okay";
|
||||
active-low;
|
||||
};
|
||||
|
||||
&gsw_port2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gsw_port3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gsw_port4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gsw_phy2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gsw_phy3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gsw_phy4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mdio_0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mdio0_pins>;
|
||||
|
||||
as21xx_0: ethernet-phy@1d {
|
||||
reg = <0x1d>;
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
|
||||
firmware-name = "as21x1x_fw.bin";
|
||||
|
||||
reset-deassert-us = <350000>;
|
||||
reset-assert-us = <200000>;
|
||||
reset-gpios = <&an7583_pinctrl 34 GPIO_ACTIVE_LOW>;
|
||||
|
||||
leds {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
led@0 {
|
||||
reg = <0>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_LAN;
|
||||
function-enumerator = <0>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
reg = <1>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_LAN;
|
||||
function-enumerator = <1>;
|
||||
default-state = "keep";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
as21xx_1: ethernet-phy@1f {
|
||||
reg = <0x1f>;
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
|
||||
firmware-name = "as21x1x_fw.bin";
|
||||
|
||||
reset-deassert-us = <350000>;
|
||||
reset-assert-us = <200000>;
|
||||
reset-gpios = <&an7583_pinctrl 35 GPIO_ACTIVE_LOW>;
|
||||
|
||||
leds {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
led@0 {
|
||||
reg = <0>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_LAN;
|
||||
function-enumerator = <0>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
reg = <1>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_LAN;
|
||||
function-enumerator = <1>;
|
||||
default-state = "keep";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gdm3 {
|
||||
status = "okay";
|
||||
|
||||
phy-handle = <&as21xx_1>;
|
||||
phy-mode = "usxgmii";
|
||||
};
|
||||
|
||||
&gdm2 {
|
||||
status = "okay";
|
||||
|
||||
phy-handle = <&as21xx_0>;
|
||||
phy-mode = "usxgmii";
|
||||
};
|
||||
818
target/linux/airoha/dts/an7583.dtsi
Normal file
818
target/linux/airoha/dts/an7583.dtsi
Normal file
@ -0,0 +1,818 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/en7523-clk.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
#include <dt-bindings/reset/airoha,an7583-reset.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
/ {
|
||||
interrupt-parent = <&gic>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
atf@80000000 {
|
||||
no-map;
|
||||
reg = <0x0 0x80000000 0x0 0x200000>;
|
||||
};
|
||||
|
||||
npu_binary: npu-binary@84000000 {
|
||||
no-map;
|
||||
reg = <0x0 0x84000000 0x0 0xa00000>;
|
||||
};
|
||||
|
||||
qdma0_buf: qdma0-buf@87000000 {
|
||||
no-map;
|
||||
reg = <0x0 0x87000000 0x0 0x2000000>;
|
||||
};
|
||||
|
||||
qdma1_buf: qdma1-buf@89000000 {
|
||||
no-map;
|
||||
reg = <0x0 0x89000000 0x0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
psci {
|
||||
compatible = "arm,psci-1.0";
|
||||
method = "smc";
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu-map {
|
||||
cluster0 {
|
||||
core0 {
|
||||
cpu = <&cpu0>;
|
||||
};
|
||||
|
||||
core1 {
|
||||
cpu = <&cpu1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x0>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
enable-method = "psci";
|
||||
clocks = <&cpufreq>;
|
||||
clock-names = "cpu";
|
||||
power-domains = <&cpufreq>;
|
||||
power-domain-names = "perf";
|
||||
next-level-cache = <&l2>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x1>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
enable-method = "psci";
|
||||
clocks = <&cpufreq>;
|
||||
clock-names = "cpu";
|
||||
power-domains = <&cpufreq>;
|
||||
power-domain-names = "perf";
|
||||
next-level-cache = <&l2>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
l2: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-size = <0x80000>;
|
||||
cache-line-size = <64>;
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
};
|
||||
};
|
||||
|
||||
cpufreq: cpufreq {
|
||||
compatible = "airoha,en7581-cpufreq";
|
||||
|
||||
operating-points-v2 = <&cpu_smcc_opp_table>;
|
||||
|
||||
#power-domain-cells = <0>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
cpu_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-500000000 {
|
||||
opp-hz = /bits/ 64 <500000000>;
|
||||
required-opps = <&smcc_opp0>;
|
||||
};
|
||||
|
||||
opp-550000000 {
|
||||
opp-hz = /bits/ 64 <550000000>;
|
||||
required-opps = <&smcc_opp1>;
|
||||
};
|
||||
|
||||
opp-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
required-opps = <&smcc_opp2>;
|
||||
};
|
||||
|
||||
opp-650000000 {
|
||||
opp-hz = /bits/ 64 <650000000>;
|
||||
required-opps = <&smcc_opp3>;
|
||||
};
|
||||
|
||||
opp-7000000000 {
|
||||
opp-hz = /bits/ 64 <700000000>;
|
||||
required-opps = <&smcc_opp4>;
|
||||
};
|
||||
|
||||
opp-7500000000 {
|
||||
opp-hz = /bits/ 64 <750000000>;
|
||||
required-opps = <&smcc_opp5>;
|
||||
};
|
||||
|
||||
opp-8000000000 {
|
||||
opp-hz = /bits/ 64 <800000000>;
|
||||
required-opps = <&smcc_opp6>;
|
||||
};
|
||||
|
||||
opp-8500000000 {
|
||||
opp-hz = /bits/ 64 <850000000>;
|
||||
required-opps = <&smcc_opp7>;
|
||||
};
|
||||
|
||||
opp-9000000000 {
|
||||
opp-hz = /bits/ 64 <900000000>;
|
||||
required-opps = <&smcc_opp8>;
|
||||
};
|
||||
|
||||
opp-9500000000 {
|
||||
opp-hz = /bits/ 64 <950000000>;
|
||||
required-opps = <&smcc_opp9>;
|
||||
};
|
||||
|
||||
opp-10000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
required-opps = <&smcc_opp10>;
|
||||
};
|
||||
|
||||
opp-10500000000 {
|
||||
opp-hz = /bits/ 64 <1050000000>;
|
||||
required-opps = <&smcc_opp11>;
|
||||
};
|
||||
|
||||
opp-11000000000 {
|
||||
opp-hz = /bits/ 64 <1100000000>;
|
||||
required-opps = <&smcc_opp12>;
|
||||
};
|
||||
|
||||
opp-11500000000 {
|
||||
opp-hz = /bits/ 64 <1150000000>;
|
||||
required-opps = <&smcc_opp13>;
|
||||
};
|
||||
|
||||
opp-12000000000 {
|
||||
opp-hz = /bits/ 64 <1200000000>;
|
||||
required-opps = <&smcc_opp14>;
|
||||
};
|
||||
};
|
||||
|
||||
cpu_smcc_opp_table: opp-table-cpu-smcc {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
smcc_opp0: opp0 {
|
||||
opp-level = <0>;
|
||||
};
|
||||
|
||||
smcc_opp1: opp1 {
|
||||
opp-level = <1>;
|
||||
};
|
||||
|
||||
smcc_opp2: opp2 {
|
||||
opp-level = <2>;
|
||||
};
|
||||
|
||||
smcc_opp3: opp3 {
|
||||
opp-level = <3>;
|
||||
};
|
||||
|
||||
smcc_opp4: opp4 {
|
||||
opp-level = <4>;
|
||||
};
|
||||
|
||||
smcc_opp5: opp5 {
|
||||
opp-level = <5>;
|
||||
};
|
||||
|
||||
smcc_opp6: opp6 {
|
||||
opp-level = <6>;
|
||||
};
|
||||
|
||||
smcc_opp7: opp7 {
|
||||
opp-level = <7>;
|
||||
};
|
||||
|
||||
smcc_opp8: opp8 {
|
||||
opp-level = <8>;
|
||||
};
|
||||
|
||||
smcc_opp9: opp9 {
|
||||
opp-level = <9>;
|
||||
};
|
||||
|
||||
smcc_opp10: opp10 {
|
||||
opp-level = <10>;
|
||||
};
|
||||
|
||||
smcc_opp11: opp11 {
|
||||
opp-level = <11>;
|
||||
};
|
||||
|
||||
smcc_opp12: opp12 {
|
||||
opp-level = <12>;
|
||||
};
|
||||
|
||||
smcc_opp13: opp13 {
|
||||
opp-level = <13>;
|
||||
};
|
||||
|
||||
smcc_opp14: opp14 {
|
||||
opp-level = <14>;
|
||||
};
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
polling-delay-passive = <10000>;
|
||||
polling-delay = <5000>;
|
||||
|
||||
thermal-sensors = <&thermal 0>;
|
||||
|
||||
trips {
|
||||
cpu_hot: cpu-hot {
|
||||
temperature = <95000>;
|
||||
hysteresis = <1000>;
|
||||
type = "hot";
|
||||
};
|
||||
|
||||
cpu-critical {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu_hot>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
clk25m: oscillator {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <25000000>;
|
||||
clock-output-names = "clkxtal";
|
||||
};
|
||||
|
||||
sys_hclk: clk-oscillator-100mhz {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <100000000>;
|
||||
clock-output-names = "sys_hclk";
|
||||
};
|
||||
|
||||
vmmc_3v3: regulator-vmmc-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sfp1: sfp1 {
|
||||
compatible = "sff,sfp";
|
||||
};
|
||||
|
||||
sfp2: sfp2 {
|
||||
compatible = "sff,sfp";
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
gic: interrupt-controller@9000000 {
|
||||
compatible = "arm,gic-v3";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x0 0x09000000 0x0 0x20000>,
|
||||
<0x0 0x09080000 0x0 0x80000>,
|
||||
<0x0 0x09400000 0x0 0x2000>,
|
||||
<0x0 0x09500000 0x0 0x2000>,
|
||||
<0x0 0x09600000 0x0 0x20000>;
|
||||
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
|
||||
chip_scu: syscon@1fa20000 {
|
||||
compatible = "airoha,en7581-chip-scu", "syscon", "simple-mfd";
|
||||
reg = <0x0 0x1fa20000 0x0 0x388>;
|
||||
|
||||
thermal: thermal {
|
||||
compatible = "airoha,an7583-thermal";
|
||||
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pbus_csr: syscon@1fbe3400 {
|
||||
compatible = "airoha,en7581-pbus-csr", "syscon";
|
||||
reg = <0x0 0x1fbe3400 0x0 0xff>;
|
||||
};
|
||||
|
||||
scuclk: system-controller@1fa20000 {
|
||||
compatible = "airoha,an7583-scu", "syscon";
|
||||
reg = <0x0 0x1fb00000 0x0 0x970>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
|
||||
airoha,chip-scu = <&chip_scu>;
|
||||
|
||||
mdio_0: mdio-bus@c8 {
|
||||
compatible = "airoha,an7583-mdio";
|
||||
reg = <0xc8>;
|
||||
|
||||
clocks = <&scuclk AN7583_CLK_MDIO0>;
|
||||
resets = <&scuclk AN7583_MDIO0>;
|
||||
};
|
||||
|
||||
mdio_1: mdio-bus@cc {
|
||||
compatible = "airoha,an7583-mdio";
|
||||
reg = <0xcc>;
|
||||
|
||||
clocks = <&scuclk AN7583_CLK_MDIO1>;
|
||||
resets = <&scuclk AN7583_MDIO1>;
|
||||
};
|
||||
};
|
||||
|
||||
system-controller@1fbf0200 {
|
||||
compatible = "syscon", "simple-mfd";
|
||||
reg = <0x0 0x1fbf0200 0x0 0xc0>;
|
||||
|
||||
an7583_pinctrl: pinctrl {
|
||||
compatible = "airoha,an7583-pinctrl";
|
||||
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
i2cclock: i2cclock@0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
|
||||
/* 20 MHz */
|
||||
clock-frequency = <20000000>;
|
||||
};
|
||||
|
||||
i2c0: i2c0@1fbf8000 {
|
||||
compatible = "airoha,an7581-i2c";
|
||||
reg = <0x0 0x1fbf8000 0x0 0x100>;
|
||||
|
||||
clocks = <&i2cclock>;
|
||||
|
||||
/* 100 kHz */
|
||||
clock-frequency = <100000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
i2c1: i2c1@1fbf8100 {
|
||||
compatible = "airoha,an7581-i2c";
|
||||
reg = <0x0 0x1fbf8100 0x0 0x100>;
|
||||
|
||||
clocks = <&i2cclock>;
|
||||
|
||||
/* 100 kHz */
|
||||
clock-frequency = <100000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
mmc0: mmc@1fa0e000 {
|
||||
compatible = "mediatek,mt7622-mmc";
|
||||
reg = <0x0 0x1fa0e000 0x0 0x1000>,
|
||||
<0x0 0x1fa0c000 0x0 0x60>;
|
||||
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&scuclk EN7581_CLK_EMMC>, <&clk25m>;
|
||||
clock-names = "source", "hclk";
|
||||
bus-width = <4>;
|
||||
max-frequency = <52000000>;
|
||||
vmmc-supply = <&vmmc_3v3>;
|
||||
disable-wp;
|
||||
cap-mmc-highspeed;
|
||||
non-removable;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
snfi: spi@1fa10000 {
|
||||
compatible = "airoha,en7581-snand";
|
||||
reg = <0x0 0x1fa10000 0x0 0x140>,
|
||||
<0x0 0x1fa11000 0x0 0x160>;
|
||||
|
||||
clocks = <&scuclk EN7523_CLK_SPI>;
|
||||
clock-names = "spi";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
spi_nand: nand@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <50000000>;
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
uart1: serial@1fbf0000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x0 0x1fbf0000 0x0 0x30>;
|
||||
reg-io-width = <4>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-frequency = <1843200>;
|
||||
};
|
||||
|
||||
watchdog@1fbf0100 {
|
||||
compatible = "airoha,en7581-wdt";
|
||||
reg = <0x0 0x1fbf0100 0x0 0x38>;
|
||||
|
||||
clocks = <&sys_hclk>;
|
||||
clock-names = "bus";
|
||||
};
|
||||
|
||||
uart2: serial@1fbf0300 {
|
||||
compatible = "airoha,en7523-uart";
|
||||
reg = <0x0 0x1fbf0300 0x0 0x30>;
|
||||
reg-io-width = <4>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-frequency = <7372800>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsuart3: serial@1fbe1000 {
|
||||
compatible = "airoha,en7523-uart";
|
||||
reg = <0x0 0x1fbe1000 0x0 0x40>;
|
||||
reg-io-width = <4>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-frequency = <7372800>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart4: serial@1fbf0600 {
|
||||
compatible = "airoha,en7523-uart";
|
||||
reg = <0x0 0x1fbf0600 0x0 0x30>;
|
||||
reg-io-width = <4>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-frequency = <7372800>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart5: serial@1fbf0700 {
|
||||
compatible = "airoha,en7523-uart";
|
||||
reg = <0x0 0x1fbf0700 0x0 0x30>;
|
||||
reg-io-width = <4>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-frequency = <7372800>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
crypto@1e004000 {
|
||||
compatible = "inside-secure,safexcel-eip93ies";
|
||||
reg = <0x0 0x1fb70000 0x0 0x1000>;
|
||||
|
||||
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pon_pcs: pcs@1fa08000 {
|
||||
compatible = "airoha,an7583-pcs-pon";
|
||||
reg = <0x0 0x1fa08000 0x0 0x1000>,
|
||||
<0x0 0x1fa80000 0x0 0x60>,
|
||||
<0x0 0x1fa80a00 0x0 0x164>,
|
||||
<0x0 0x1fa84000 0x0 0x450>,
|
||||
<0x0 0x1fa85900 0x0 0x338>,
|
||||
<0x0 0x1fa86000 0x0 0x300>,
|
||||
<0x0 0x1fa8f000 0x0 0x1000>,
|
||||
<0x0 0x1fa8e000 0x0 0x1000>;
|
||||
reg-names = "xfi_mac", "hsgmii_an", "hsgmii_pcs",
|
||||
"multi_sgmii", "usxgmii",
|
||||
"hsgmii_rate_adp", "xfi_ana", "xfi_pma";
|
||||
|
||||
resets = <&scuclk AN7583_XPON_MAC_RST>,
|
||||
<&scuclk AN7583_XPON_PHY_RST>,
|
||||
<&scuclk AN7583_XPON_XFI_RST>;
|
||||
reset-names = "mac", "phy", "xfi";
|
||||
|
||||
airoha,scu = <&scuclk>;
|
||||
};
|
||||
|
||||
eth_pcs: pcs@1fa09000 {
|
||||
compatible = "airoha,an7583-pcs-eth";
|
||||
reg = <0x0 0x1fa09000 0x0 0x1000>,
|
||||
<0x0 0x1fa70000 0x0 0x60>,
|
||||
<0x0 0x1fa70a00 0x0 0x164>,
|
||||
<0x0 0x1fa74000 0x0 0x450>,
|
||||
<0x0 0x1fa75900 0x0 0x338>,
|
||||
<0x0 0x1fa76000 0x0 0x300>,
|
||||
<0x0 0x1fa7f000 0x0 0x1000>,
|
||||
<0x0 0x1fa7e000 0x0 0x1000>;
|
||||
reg-names = "xfi_mac", "hsgmii_an", "hsgmii_pcs",
|
||||
"multi_sgmii", "usxgmii",
|
||||
"hsgmii_rate_adp", "xfi_ana", "xfi_pma";
|
||||
|
||||
resets = <&scuclk AN7583_XSI_MAC_RST>,
|
||||
<&scuclk AN7583_XSI_PHY_RST>;
|
||||
reset-names = "mac", "phy";
|
||||
|
||||
airoha,scu = <&scuclk>;
|
||||
};
|
||||
|
||||
eth: ethernet@1fb50000 {
|
||||
compatible = "airoha,an7583-eth";
|
||||
reg = <0 0x1fb50000 0 0x2600>,
|
||||
<0 0x1fb54000 0 0x2000>,
|
||||
<0 0x1fb56000 0 0x2000>;
|
||||
reg-names = "fe", "qdma0", "qdma1";
|
||||
|
||||
resets = <&scuclk AN7583_FE_RST>,
|
||||
<&scuclk AN7583_FE_PDMA_RST>,
|
||||
<&scuclk AN7583_FE_QDMA_RST>,
|
||||
<&scuclk AN7583_DUAL_HSI0_MAC_RST>,
|
||||
<&scuclk AN7583_DUAL_HSI1_MAC_RST>,
|
||||
<&scuclk AN7583_XFP_MAC_RST>;
|
||||
reset-names = "fe", "pdma", "qdma",
|
||||
"hsi0-mac", "hsi1-mac",
|
||||
"xfp-mac";
|
||||
|
||||
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
memory-region = <&qdma0_buf>, <&qdma1_buf>;
|
||||
memory-region-names = "qdma0-buf", "qdma1-buf";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gdm1: ethernet@1 {
|
||||
compatible = "airoha,eth-mac";
|
||||
reg = <1>;
|
||||
phy-mode = "internal";
|
||||
status = "disabled";
|
||||
|
||||
fixed-link {
|
||||
speed = <10000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
|
||||
gdm2: ethernet@2 {
|
||||
compatible = "airoha,eth-mac";
|
||||
reg = <2>;
|
||||
pcs = <&pon_pcs>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gdm3: ethernet@3 {
|
||||
compatible = "airoha,eth-mac";
|
||||
reg = <3>;
|
||||
pcs = <ð_pcs>;
|
||||
airoha,gdm-srcport = <0x16>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
switch: switch@1fb58000 {
|
||||
compatible = "airoha,an7583-switch";
|
||||
reg = <0 0x1fb58000 0 0x8000>;
|
||||
resets = <&scuclk AN7583_GSW_RST>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gsw_port1: port@1 {
|
||||
reg = <1>;
|
||||
label = "lan1";
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&gsw_phy1>;
|
||||
};
|
||||
|
||||
gsw_port2: port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&gsw_phy2>;
|
||||
};
|
||||
|
||||
gsw_port3: port@3 {
|
||||
reg = <3>;
|
||||
label = "lan3";
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&gsw_phy3>;
|
||||
};
|
||||
|
||||
gsw_port4: port@4 {
|
||||
reg = <4>;
|
||||
label = "lan4";
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&gsw_phy4>;
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <&gdm1>;
|
||||
phy-mode = "internal";
|
||||
|
||||
fixed-link {
|
||||
speed = <10000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
mdio: mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gsw_phy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <9>;
|
||||
phy-mode = "internal";
|
||||
|
||||
leds {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gsw_phy1_led0: gsw-phy1-led0@0 {
|
||||
reg = <0>;
|
||||
function = "phy1_led0";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gsw_phy1_led1: gsw-phy1-led1@1 {
|
||||
reg = <1>;
|
||||
function = "phy1_led1";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsw_phy2: ethernet-phy@2 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <10>;
|
||||
phy-mode = "internal";
|
||||
|
||||
leds {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gsw_phy2_led0: gsw-phy2-led0@0 {
|
||||
reg = <0>;
|
||||
function = "phy2_led0";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gsw_phy2_led1: gsw-phy2-led1@1 {
|
||||
reg = <1>;
|
||||
function = "phy1_led1";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsw_phy3: ethernet-phy@3 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <11>;
|
||||
phy-mode = "internal";
|
||||
|
||||
leds {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gsw_phy3_led0: gsw-phy3-led0@0 {
|
||||
reg = <0>;
|
||||
function = LED_FUNCTION_LAN;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gsw_phy3_led1: gsw-phy3-led1@1 {
|
||||
reg = <1>;
|
||||
function = LED_FUNCTION_LAN;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsw_phy4: ethernet-phy@4 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <12>;
|
||||
phy-mode = "internal";
|
||||
|
||||
leds {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gsw_phy4_led0: gsw-phy4-led0@0 {
|
||||
reg = <0>;
|
||||
function = LED_FUNCTION_LAN;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gsw_phy4_led1: gsw-phy4-led1@1 {
|
||||
reg = <1>;
|
||||
function = LED_FUNCTION_LAN;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
55
target/linux/airoha/image/an7583.mk
Normal file
55
target/linux/airoha/image/an7583.mk
Normal file
@ -0,0 +1,55 @@
|
||||
define Build/an7583-bl2-bl31-uboot
|
||||
head -c $$((0x800)) /dev/zero > $@
|
||||
cat $(STAGING_DIR_IMAGE)/an7583_$1-bl2.fip >> $@
|
||||
dd if=$(STAGING_DIR_IMAGE)/an7583_$1-bl31-uboot.img of=$@ bs=1 seek=$$((0x20000)) conv=notrunc
|
||||
endef
|
||||
|
||||
define Build/an7583-emmc-bl2-bl31-uboot
|
||||
head -c $$((0x800)) /dev/zero > $@
|
||||
cat $(STAGING_DIR_IMAGE)/an7583_$1-bl2.fip >> $@
|
||||
dd if=$(STAGING_DIR_IMAGE)/an7583_$1-bl31-u-boot.fip of=$@ bs=1 seek=$$((0x20000)) conv=notrunc
|
||||
endef
|
||||
|
||||
define Build/an7583-preloader
|
||||
cat $(STAGING_DIR_IMAGE)/an7583_$1-bl2.fip >> $@
|
||||
endef
|
||||
|
||||
define Build/an7583-bl31-uboot
|
||||
cat $(STAGING_DIR_IMAGE)/an7583_$1-bl31-u-boot.fip >> $@
|
||||
endef
|
||||
|
||||
define Device/FitImageLzma
|
||||
KERNEL_SUFFIX := -uImage.itb
|
||||
KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb
|
||||
KERNEL_NAME := Image
|
||||
endef
|
||||
|
||||
define Device/airoha_an7583-evb
|
||||
$(call Device/FitImageLzma)
|
||||
DEVICE_VENDOR := Airoha
|
||||
DEVICE_MODEL := AN7583 Evaluation Board (SNAND)
|
||||
DEVICE_PACKAGES := kmod-leds-pwm kmod-input-gpio-keys-polled
|
||||
DEVICE_DTS := an7583-evb
|
||||
DEVICE_DTS_DIR := ../dts
|
||||
DEVICE_DTS_CONFIG := config@1
|
||||
KERNEL_LOADADDR := 0x80088000
|
||||
IMAGE/sysupgrade.bin := append-kernel | pad-to 128k | append-rootfs | pad-rootfs | append-metadata
|
||||
ARTIFACT/bl2-bl31-uboot.bin := an7583-bl2-bl31-uboot rfb
|
||||
ARTIFACT/preloader.bin := an7583-preloader rfb
|
||||
ARTIFACT/bl31-uboot.fip := an7583-bl31-uboot rfb
|
||||
ARTIFACTS := bl2-bl31-uboot.bin preloader.bin bl31-uboot.fip
|
||||
endef
|
||||
TARGET_DEVICES += airoha_an7583-evb
|
||||
|
||||
define Device/airoha_an7583-evb-emmc
|
||||
DEVICE_VENDOR := Airoha
|
||||
DEVICE_MODEL := AN7583 Evaluation Board (EMMC)
|
||||
DEVICE_DTS := an7583-evb-emmc
|
||||
DEVICE_DTS_DIR := ../dts
|
||||
DEVICE_PACKAGES := kmod-i2c-an7581
|
||||
ARTIFACT/preloader.bin := an7583-preloader rfb
|
||||
ARTIFACT/bl31-uboot.fip := an7583-bl31-uboot rfb
|
||||
ARTIFACT/bl2-bl31-uboot.bin := an7583-emmc-bl2-bl31-uboot rfb
|
||||
ARTIFACTS := bl2-bl31-uboot.bin preloader.bin bl31-uboot.fip
|
||||
endef
|
||||
TARGET_DEVICES += airoha_an7583-evb-emmc
|
||||