diff --git a/target/linux/rockchip/dts/rk3568/rk3568-opc-h68k.dts b/target/linux/rockchip/dts/rk3568/rk3568-opc-h68k.dts
index 9c5ed10080..bf6934a926 100644
--- a/target/linux/rockchip/dts/rk3568/rk3568-opc-h68k.dts
+++ b/target/linux/rockchip/dts/rk3568/rk3568-opc-h68k.dts
@@ -126,7 +126,7 @@
 &mdio0 {
 	rgmii_phy0: ethernet-phy@1 {
 		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
+		reg = <0x1>;
 		pinctrl-0 = <&eth_phy0_reset_pin>;
 		pinctrl-names = "default";
 	};
@@ -135,7 +135,7 @@
 &mdio1 {
 	rgmii_phy1: ethernet-phy@1 {
 		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
+		reg = <0x1>;
 		pinctrl-0 = <&eth_phy1_reset_pin>;
 		pinctrl-names = "default";
 	};
diff --git a/target/linux/rockchip/dts/rk3568/rk3568-opc-h69k.dts b/target/linux/rockchip/dts/rk3568/rk3568-opc-h69k.dts
index 2e251af8d9..151f86f6af 100644
--- a/target/linux/rockchip/dts/rk3568/rk3568-opc-h69k.dts
+++ b/target/linux/rockchip/dts/rk3568/rk3568-opc-h69k.dts
@@ -87,7 +87,7 @@
 &mdio1 {
 	rgmii_phy1: ethernet-phy@1 {
 		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
+		reg = <0x1>;
 		pinctrl-0 = <&eth_phy1_reset_pin>;
 		pinctrl-names = "default";
 	};
diff --git a/target/linux/rockchip/dts/rk3568/rk3568-roc-k40pro.dtsi b/target/linux/rockchip/dts/rk3568/rk3568-roc-k40pro.dtsi
index c746a2c228..4adf207bae 100644
--- a/target/linux/rockchip/dts/rk3568/rk3568-roc-k40pro.dtsi
+++ b/target/linux/rockchip/dts/rk3568/rk3568-roc-k40pro.dtsi
@@ -245,7 +245,7 @@
 &mdio0 {
 	rgmii_phy0: ethernet-phy@1 {
 		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
+		reg = <0x1>;
 		pinctrl-0 = <&eth_phy0_reset_pin>;
 		pinctrl-names = "default";
 		realtek,led-data = <0xAC10>;
@@ -255,7 +255,7 @@
 &mdio1 {
 	rgmii_phy1: ethernet-phy@1 {
 		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
+		reg = <0x1>;
 		pinctrl-0 = <&eth_phy1_reset_pin>;
 		pinctrl-names = "default";
 		realtek,led-data = <0xAC10>;