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target/rockchip: update rk3576 dts

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This commit is contained in:
Liangbin Lian 2025-09-15 15:30:58 +08:00
parent f6b008cc8d
commit f6828be6f2
5 changed files with 409 additions and 34 deletions
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221
target/linux/rockchip/dts/rk3576/rk3576-gpu.dtsi Normal file
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@ -0,0 +1,221 @@
/ {
gpu_opp_table_rk: gpu-opp-table-rk {
compatible = "operating-points-v2";
nvmem-cells = <&gpu_leakage>, <&gpu_opp_info>,
<&specification_serial_number>, <&test_version>;
nvmem-cell-names = "leakage", "opp-info",
"specification_serial_number", "test_version";
rockchip,supported-hw;
rockchip,pvtm-hw = <0x06>;
rockchip,pvtm-voltage-sel-hw = <
0 689 0
690 709 1
710 729 2
730 749 3
750 769 4
770 789 5
790 809 6
810 829 7
830 849 8
850 869 9
870 9999 10
>;
rockchip,pvtm-voltage-sel = <
0 704 0
705 724 1
725 744 2
745 764 3
765 784 4
785 804 5
805 824 6
825 844 7
845 864 8
865 884 9
885 9999 10
>;
rockchip,pvtm-low-len-sel = <0>;
rockchip,pvtm-pvtpll;
rockchip,pvtpll = <&gpu_pvtpll>;
rockchip,pvtm-offset = <0x54>;
rockchip,pvtm-sample-time = <1100>;
rockchip,pvtm-freq = <800000>;
rockchip,pvtm-volt = <750000>;
rockchip,pvtm-ref-temp = <35>;
rockchip,pvtm-temp-prop = <0 0>;
rockchip,pvtm-thermal-zone = "gpu-thermal";
rockchip,grf = <&gpu_grf>;
volt-mem-read-margin = <
855000 1
765000 2
675000 3
495000 4
>;
intermediate-threshold-freq = <300000>;
rockchip,opp-clocks = <&cru CLK_GPU>, <&cru PCLK_GPU_ROOT>;
rockchip,temp-hysteresis = <5000>;
rockchip,low-temp = <15000>;
rockchip,low-temp-min-volt = <750000>;
opp-300000000 {
opp-supported-hw = <0xf9 0xffff>;
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <712500 712500 875000>;
};
opp-400000000 {
opp-supported-hw = <0xf9 0xffff>;
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <712500 712500 875000>;
};
opp-500000000 {
opp-supported-hw = <0xf9 0xffff>;
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <712500 712500 875000>;
};
opp-600000000 {
opp-supported-hw = <0xf9 0xffff>;
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <712500 712500 875000>;
};
opp-700000000 {
opp-supported-hw = <0xf9 0xffff>;
opp-hz = /bits/ 64 <700000000>;
opp-microvolt = <712500 712500 875000>;
opp-microvolt-L0 = <750000 750000 875000>;
opp-microvolt-L1 = <750000 750000 875000>;
opp-microvolt-L2 = <737500 737500 875000>;
opp-microvolt-L3 = <725000 725000 875000>;
opp-microvolt-L4 = <725000 725000 875000>;
};
/* The Max frequency of RK3576S GPU is 800MHz */
opp-s-800000000 {
opp-supported-hw = <0x08 0xffff>;
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <837500 837500 875000>;
opp-microvolt-L1 = <825000 825000 875000>;
opp-microvolt-L2 = <812500 812500 875000>;
opp-microvolt-L3 = <800000 800000 875000>;
opp-microvolt-L4 = <787500 787500 875000>;
opp-microvolt-L5 = <775000 775000 875000>;
opp-microvolt-L6 = <762500 762500 875000>;
opp-microvolt-L7 = <750000 750000 875000>;
opp-microvolt-L8 = <737500 737500 875000>;
opp-microvolt-L9 = <725000 725000 875000>;
opp-microvolt-L10 = <725000 725000 875000>;
};
opp-800000000 {
opp-supported-hw = <0xf1 0xffff>;
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <812500 812500 875000>;
opp-microvolt-L1 = <812500 812500 875000>;
opp-microvolt-L2 = <800000 800000 875000>;
opp-microvolt-L3 = <787500 787500 875000>;
opp-microvolt-L4 = <775000 775000 875000>;
opp-microvolt-L5 = <762500 762500 875000>;
opp-microvolt-L6 = <750000 750000 875000>;
opp-microvolt-L7 = <737500 737500 875000>;
opp-microvolt-L8 = <725000 725000 875000>;
opp-microvolt-L9 = <725000 725000 875000>;
opp-microvolt-L10 = <725000 725000 875000>;
};
opp-900000000 {
opp-supported-hw = <0xf1 0xffff>;
opp-hz = /bits/ 64 <900000000>;
opp-microvolt = <875000 875000 875000>;
opp-microvolt-L1 = <875000 875000 875000>;
opp-microvolt-L2 = <862500 862500 875000>;
opp-microvolt-L3 = <850000 850000 875000>;
opp-microvolt-L4 = <837500 837500 875000>;
opp-microvolt-L5 = <825000 825000 875000>;
opp-microvolt-L6 = <812500 812500 875000>;
opp-microvolt-L7 = <800000 800000 875000>;
opp-microvolt-L8 = <787500 787500 875000>;
opp-microvolt-L9 = <775000 775000 875000>;
opp-microvolt-L10 = <762500 762500 875000>;
};
/* RK3576J/M GPU OPPs */
opp-j-m-300000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <750000 750000 950000>;
};
opp-j-m-400000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <750000 750000 950000>;
};
opp-j-m-500000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <750000 750000 950000>;
};
opp-j-m-600000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <750000 750000 950000>;
};
opp-j-m-700000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <700000000>;
opp-microvolt = <750000 750000 950000>;
opp-microvolt-L0 = <775000 775000 950000>;
opp-microvolt-L1 = <762500 762500 950000>;
};
gpu_opp_j_m_800000000: opp-j-m-800000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <850000 850000 875000>;
opp-microvolt-L1 = <837500 837500 875000>;
opp-microvolt-L2 = <825000 825000 875000>;
opp-microvolt-L3 = <812500 812500 875000>;
opp-microvolt-L4 = <800000 800000 875000>;
opp-microvolt-L5 = <787500 787500 875000>;
opp-microvolt-L6 = <775000 775000 875000>;
opp-microvolt-L7 = <762500 762500 875000>;
opp-microvolt-L8 = <750000 750000 875000>;
opp-microvolt-L9 = <750000 750000 875000>;
opp-microvolt-L10 = <750000 750000 875000>;
};
};
soc {
gpu: gpu@27800000 {
compatible = "arm,mali-bifrost";
reg = <0x0 0x27800000 0x0 0x20000>;
interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "GPU", "MMU", "JOB";
upthreshold = <40>;
downdifferential = <10>;
clocks = <&scmi_clk SCMI_CLK_GPU>, <&cru CLK_GPU>;
clock-names = "clk_mali", "clk_gpu";
assigned-clocks = <&cru CLK_GPU>;
assigned-clock-rates = <198000000>;
power-domains = <&power RK3576_PD_GPU>;
operating-points-v2 = <&gpu_opp_table_rk>;
#cooling-cells = <2>;
dynamic-power-coefficient = <1625>;
status = "disabled";
};
gpu_pvtpll: syscon@27268000 {
compatible = "rockchip,rk3576-gpu-pvtpll", "syscon";
reg = <0x0 0x27268000 0x0 0x1000>;
};
};
};
&otp {
gpu_opp_info: gpu-opp-info@48 {
reg = <0x48 0x6>;
};
};

2
target/linux/rockchip/dts/rk3576/rk3576-ip-rk806.dtsi
View File

@ -8,7 +8,7 @@
};
&vdd_npu_s0 {
regulator-always-on;
//regulator-always-on;
};
&rknpu {

16
target/linux/rockchip/dts/rk3576/rk3576-ip.dtsi
View File

@ -1,11 +1,24 @@
#include "rk3576-vpu.dtsi"
#include "rk3576-npu.dtsi"
#include "rk3576-gpu.dtsi"
&gpu {
reg = <0x0 0x27800000 0x0 0x20000>;
};
&otp {
test_version: test-version@7 {
reg = <0x7 0x1>;
bits = <0 4>;
};
specification_serial_number: specification-serial-number@8 {
reg = <0x08 0x1>;
bits = <0 5>;
};
};
#if 0
// NPU power domain cannot be registered (so no one will switch it off), that will crash system when rknpu probing
// [ 12.673716] rockchip-pm-domain 27380000.power-management:power-controller: failed to get ack on domain 'nputop', val=0x11bff
&power {
@ -16,6 +29,7 @@
/delete-property/ power-domains;
/delete-property/ power-domain-names;
};
#endif
#ifdef DT_RK3576_NO_POWER_DOMAINS
&jpegd {
@ -66,4 +80,4 @@
&rkvdec_mmu {
/delete-property/ power-domains;
};
#endif
#endif

202
target/linux/rockchip/dts/rk3576/rk3576-npu.dtsi
View File

@ -32,16 +32,39 @@
npu_opp_table: npu-opp-table {
compatible = "operating-points-v2";
nvmem-cells = <&npu_leakage>, <&npu_opp_info>;
nvmem-cell-names = "leakage", "opp-info";
nvmem-cells = <&npu_leakage>, <&npu_opp_info>,
<&specification_serial_number>, <&test_version>;
nvmem-cell-names = "leakage", "opp-info",
"specification_serial_number", "test_version";
rockchip,supported-hw;
rockchip,pvtm-voltage-sel = <
0 796 0
797 816 1
817 836 2
837 856 3
857 9999 4
rockchip,pvtm-hw = <0x06>;
rockchip,pvtm-voltage-sel-hw = <
0 739 0
740 759 1
760 779 2
780 799 3
800 819 4
820 839 5
840 859 6
860 879 7
880 899 8
900 9999 9
>;
rockchip,pvtm-voltage-sel = <
0 719 0
720 739 1
740 759 2
760 779 3
780 799 4
800 819 5
820 839 6
840 859 7
860 879 8
880 899 9
900 9999 10
>;
rockchip,pvtm-low-len-sel = <0>;
rockchip,pvtm-pvtpll;
rockchip,pvtpll = <&npu_pvtpll>;
rockchip,pvtm-offset = <0x54>;
@ -67,53 +90,153 @@
rockchip,temp-hysteresis = <5000>;
rockchip,low-temp = <15000>;
rockchip,low-temp-min-volt = <750000>;
rockchip,init-freq = <950000>;
opp-300000000 {
opp-supported-hw = <0xf9 0xffff>;
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <725000 725000 850000>;
opp-microvolt = <725000 725000 875000>;
};
opp-400000000 {
opp-supported-hw = <0xf9 0xffff>;
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <725000 725000 850000>;
opp-microvolt = <725000 725000 875000>;
};
/* The Max frequency of RK3576S NPU is 500MHz */
opp-s-500000000 {
opp-supported-hw = <0x08 0xffff>;
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <725000 725000 875000>;
opp-microvolt-L0 = <750000 750000 875000>;
opp-microvolt-L1 = <737500 737500 875000>;
opp-microvolt-L2 = <737500 737500 875000>;
};
opp-500000000 {
opp-supported-hw = <0xf1 0xffff>;
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <725000 725000 850000>;
opp-microvolt = <725000 725000 875000>;
opp-microvolt-L0 = <737500 737500 875000>;
opp-microvolt-L1 = <737500 737500 875000>;
};
opp-600000000 {
opp-supported-hw = <0xf1 0xffff>;
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <725000 725000 850000>;
opp-microvolt = <725000 725000 875000>;
opp-microvolt-L0 = <737500 737500 875000>;
opp-microvolt-L1 = <737500 737500 875000>;
};
opp-700000000 {
opp-supported-hw = <0xf1 0xffff>;
opp-hz = /bits/ 64 <700000000>;
opp-microvolt = <750000 750000 850000>;
opp-microvolt-L1 = <737500 737500 850000>;
opp-microvolt-L2 = <725000 725000 850000>;
opp-microvolt-L3 = <725000 725000 850000>;
opp-microvolt-L4 = <725000 725000 850000>;
opp-microvolt = <725000 725000 875000>;
opp-microvolt-L0 = <775000 775000 875000>;
opp-microvolt-L1 = <775000 775000 875000>;
opp-microvolt-L2 = <762500 762500 875000>;
opp-microvolt-L3 = <762500 762500 875000>;
opp-microvolt-L4 = <750000 750000 875000>;
opp-microvolt-L5 = <737500 737500 875000>;
opp-microvolt-L6 = <725000 725000 875000>;
};
opp-800000000 {
opp-supported-hw = <0xf1 0xffff>;
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <775000 775000 850000>;
opp-microvolt-L1 = <762500 762500 850000>;
opp-microvolt-L2 = <750000 750000 850000>;
opp-microvolt-L3 = <737500 737500 850000>;
opp-microvolt-L4 = <725000 725000 850000>;
opp-microvolt = <800000 800000 875000>;
opp-microvolt-L1 = <800000 800000 875000>;
opp-microvolt-L2 = <787500 787500 875000>;
opp-microvolt-L3 = <775000 775000 875000>;
opp-microvolt-L4 = <762500 762500 875000>;
opp-microvolt-L5 = <750000 750000 875000>;
opp-microvolt-L6 = <737500 737500 875000>;
opp-microvolt-L7 = <725000 725000 875000>;
opp-microvolt-L8 = <725000 725000 875000>;
opp-microvolt-L9 = <725000 725000 875000>;
opp-microvolt-L10 = <725000 725000 875000>;
};
opp-900000000 {
opp-supported-hw = <0xf1 0xffff>;
opp-hz = /bits/ 64 <900000000>;
opp-microvolt = <800000 800000 850000>;
opp-microvolt-L1 = <787500 787500 850000>;
opp-microvolt-L2 = <775000 775000 850000>;
opp-microvolt-L3 = <762500 762500 850000>;
opp-microvolt-L4 = <750000 750000 850000>;
opp-microvolt = <850000 850000 875000>;
opp-microvolt-L1 = <850000 850000 875000>;
opp-microvolt-L2 = <837500 837500 875000>;
opp-microvolt-L3 = <825000 825000 875000>;
opp-microvolt-L4 = <812500 812500 875000>;
opp-microvolt-L5 = <800000 800000 875000>;
opp-microvolt-L6 = <787500 787500 875000>;
opp-microvolt-L7 = <775000 775000 875000>;
opp-microvolt-L8 = <762500 762500 875000>;
opp-microvolt-L9 = <750000 750000 875000>;
opp-microvolt-L10 = <737500 737500 875000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <850000 850000 850000>;
opp-microvolt-L3 = <837500 837500 850000>;
opp-microvolt-L4 = <825000 825000 850000>;
opp-950000000 {
opp-supported-hw = <0xf1 0xffff>;
opp-hz = /bits/ 64 <950000000>;
opp-microvolt = <875000 875000 875000>;
opp-microvolt-L1 = <875000 875000 875000>;
opp-microvolt-L2 = <862500 862500 875000>;
opp-microvolt-L3 = <850000 850000 875000>;
opp-microvolt-L4 = <837500 837500 875000>;
opp-microvolt-L5 = <825000 825000 875000>;
opp-microvolt-L6 = <812500 812500 875000>;
opp-microvolt-L7 = <800000 800000 875000>;
opp-microvolt-L8 = <787500 787500 875000>;
opp-microvolt-L9 = <775000 775000 875000>;
opp-microvolt-L10 = <762500 762500 875000>;
};
/* RK3576J/M NPU OPPs */
opp-j-m-300000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <750000 750000 875000>;
};
opp-j-m-400000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <750000 750000 875000>;
};
opp-j-m-500000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <750000 750000 875000>;
};
opp-j-m-600000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <750000 750000 875000>;
};
opp-j-m-700000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <700000000>;
opp-microvolt = <750000 750000 875000>;
opp-microvolt-L0 = <787500 787500 875000>;
opp-microvolt-L1 = <775000 775000 875000>;
opp-microvolt-L2 = <762500 762500 875000>;
};
npu_opp_j_m_800000000: opp-j-m-800000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <750000 750000 875000>;
opp-microvolt-L0 = <812500 812500 875000>;
opp-microvolt-L1 = <800000 800000 875000>;
opp-microvolt-L2 = <787500 787500 875000>;
opp-microvolt-L3 = <775000 775000 875000>;
opp-microvolt-L4 = <762500 762500 875000>;
};
npu_opp_j_m_850000000: opp-j-m-850000000 {
opp-supported-hw = <0x06 0xffff>;
opp-hz = /bits/ 64 <850000000>;
opp-microvolt = <837500 837500 875000>;
opp-microvolt-L1 = <825000 825000 875000>;
opp-microvolt-L2 = <812500 812500 875000>;
opp-microvolt-L3 = <800000 800000 875000>;
opp-microvolt-L4 = <787500 787500 875000>;
opp-microvolt-L5 = <775000 775000 875000>;
opp-microvolt-L6 = <762500 762500 875000>;
opp-microvolt-L7 = <750000 750000 875000>;
opp-microvolt-L8 = <750000 750000 875000>;
opp-microvolt-L9 = <750000 750000 875000>;
};
};
rknpu_mmu: iommu@27702000 {
@ -143,3 +266,18 @@
reg = <0x42 0x6>;
};
};
&power {
power-domain@RK3576_PD_NPU {
power-domain@RK3576_PD_NPUTOP {
clocks = <&cru ACLK_RKNN0>,
<&cru ACLK_RKNN1>,
<&cru ACLK_RKNN_CBUF>,
<&scmi_clk SCMI_CLK_NPU>,
<&cru HCLK_RKNN_CBUF>,
<&cru HCLK_RKNN_ROOT>,
<&cru HCLK_NPU_CM0_ROOT>,
<&cru PCLK_NPUTOP_ROOT>;
};
};
};

2
target/linux/rockchip/dts/rk3576/rk3576-patch.dtsi
View File

@ -7,6 +7,8 @@
compatible = "rockchip,system-monitor";
rockchip,thermal-zone = "littlecore-thermal";
rockchip,polling-delay = <1000>;
status = "disabled";
};
thermal_zones: thermal-zones {
/* sensor near the center of the SoC */