ade13ffdaa
Based on: *2dc8224e37/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c* https://lore.kernel.org/all/20241016-b4-rk3588-bridge-upstream-v10-1-87ef92a6d14e@collabora.com/ *a52dffaa46/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c*a52dffaa46/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c*a52dffaa46/drivers/gpu/drm/rockchip/rockchip_vop2_reg.cSigned-off-by: Liangbin Lian <jjm2473@gmail.com>
49 lines
1.8 KiB
Diff
49 lines
1.8 KiB
Diff
From 9d47e7deb8f1d42c220afb43ff965a4b11f6c7dc Mon Sep 17 00:00:00 2001
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From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
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Date: Tue, 18 Mar 2025 14:35:38 +0200
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Subject: [PATCH 03/11] phy: rockchip: samsung-hdptx: Do no set
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rk_hdptx_phy->rate in case of errors
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Ensure rk_hdptx_ropll_tmds_cmn_config() updates hdptx->rate only after
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all the other operations have been successful.
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Fixes: c4b09c562086 ("phy: phy-rockchip-samsung-hdptx: Add clock provider support")
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Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
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Link: https://lore.kernel.org/r/20250318-phy-sam-hdptx-bpc-v6-4-8cb1678e7663@collabora.com
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Signed-off-by: Vinod Koul <vkoul@kernel.org>
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---
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drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 10 ++++++----
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1 file changed, 6 insertions(+), 4 deletions(-)
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diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
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index 2e1c50b2895d..6a062e509a01 100644
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--- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
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+++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
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@@ -771,9 +771,7 @@ static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx,
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{
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const struct ropll_config *cfg = NULL;
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struct ropll_config rc = {0};
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- int i;
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-
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- hdptx->rate = rate * 100;
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+ int ret, i;
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for (i = 0; i < ARRAY_SIZE(ropll_tmds_cfg); i++)
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if (rate == ropll_tmds_cfg[i].bit_rate) {
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@@ -828,7 +826,11 @@ static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx,
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regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_EN_MASK,
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FIELD_PREP(PLL_PCG_CLK_EN_MASK, 0x1));
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- return rk_hdptx_post_enable_pll(hdptx);
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+ ret = rk_hdptx_post_enable_pll(hdptx);
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+ if (!ret)
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+ hdptx->rate = rate * 100;
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+
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+ return ret;
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}
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static int rk_hdptx_ropll_tmds_mode_config(struct rk_hdptx_phy *hdptx,
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--
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2.51.0
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