ade13ffdaa
Based on: *2dc8224e37/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c* https://lore.kernel.org/all/20241016-b4-rk3588-bridge-upstream-v10-1-87ef92a6d14e@collabora.com/ *a52dffaa46/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c*a52dffaa46/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c*a52dffaa46/drivers/gpu/drm/rockchip/rockchip_vop2_reg.cSigned-off-by: Liangbin Lian <jjm2473@gmail.com>
55 lines
2.2 KiB
Diff
55 lines
2.2 KiB
Diff
From 402fc28c3a92e42200b15d5fac63f78e7a50d2e8 Mon Sep 17 00:00:00 2001
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From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
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Date: Tue, 28 Oct 2025 10:00:56 +0200
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Subject: [PATCH 11/11] phy: rockchip: samsung-hdptx: Prevent Inter-Pair Skew
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from exceeding the limits
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Fixup PHY deskew FIFO to prevent the phase of D2 lane going ahead of
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other lanes. It's worth noting this might only happen when dealing with
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HDMI 2.0 rates.
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Fixes: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver")
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Co-developed-by: Algea Cao <algea.cao@rock-chips.com>
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Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
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Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
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Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
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Link: https://patch.msgid.link/20251028-phy-hdptx-fixes-v1-3-ecc642a59d94@collabora.com
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Signed-off-by: Vinod Koul <vkoul@kernel.org>
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---
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drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 9 +++++----
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1 file changed, 5 insertions(+), 4 deletions(-)
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diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
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index bdc52495774d..47c2a3811685 100644
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--- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
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+++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
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@@ -515,13 +515,9 @@ static const struct reg_sequence rk_hdtpx_common_lane_init_seq[] = {
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static const struct reg_sequence rk_hdtpx_tmds_lane_init_seq[] = {
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REG_SEQ0(LANE_REG(0312), 0x00),
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- REG_SEQ0(LANE_REG(031e), 0x00),
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REG_SEQ0(LANE_REG(0412), 0x00),
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- REG_SEQ0(LANE_REG(041e), 0x00),
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REG_SEQ0(LANE_REG(0512), 0x00),
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- REG_SEQ0(LANE_REG(051e), 0x00),
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REG_SEQ0(LANE_REG(0612), 0x00),
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- REG_SEQ0(LANE_REG(061e), 0x08),
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REG_SEQ0(LANE_REG(0303), 0x2f),
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REG_SEQ0(LANE_REG(0403), 0x2f),
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REG_SEQ0(LANE_REG(0503), 0x2f),
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@@ -534,6 +530,11 @@ static const struct reg_sequence rk_hdtpx_tmds_lane_init_seq[] = {
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REG_SEQ0(LANE_REG(0406), 0x1c),
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REG_SEQ0(LANE_REG(0506), 0x1c),
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REG_SEQ0(LANE_REG(0606), 0x1c),
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+ /* Keep Inter-Pair Skew in the limits */
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+ REG_SEQ0(LANE_REG(031e), 0x02),
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+ REG_SEQ0(LANE_REG(041e), 0x02),
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+ REG_SEQ0(LANE_REG(051e), 0x02),
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+ REG_SEQ0(LANE_REG(061e), 0x0a),
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};
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static bool rk_hdptx_phy_is_rw_reg(struct device *dev, unsigned int reg)
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--
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2.51.0
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